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Cover image for Three Dimensional Integrated Circuit Design EDA, Design and Microarchitectures
Three Dimensional Integrated Circuit Design EDA, Design and Microarchitectures
Author 
Xie, Yuan. editor. Cong, Jason. editor. Sapatnekar, Sachin. editor. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-1-4419-0784-4
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Cover image for Routing Congestion in VLSI Circuits: Estimation and Optimization
Routing Congestion in VLSI Circuits: Estimation and Optimization
Author 
Saxena, Prashant. author. Shelar, Rupesh S. author. Sapatnekar, Sachin S. author. SpringerLink (Online service)
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ONLINE
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http://dx.doi.org/10.1007/0-387-48550-3
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