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Cover image for CMOS SRAM Circuit Design and Parametric Test in Nano-Scaled Technologies Process-Aware SRAM Design and Test
CMOS SRAM Circuit Design and Parametric Test in Nano-Scaled Technologies Process-Aware SRAM Design and Test
Author 
Pavlov, Andrei. author. Sachdev, Manoj. author. SpringerLink (Online service)
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ONLINE
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http://dx.doi.org/10.1007/978-1-4020-8363-1
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2. 
Cover image for In Search of the Next Memory Inside the Circuitry from the Oldest to the Emerging Non-Volatile Memories
In Search of the Next Memory Inside the Circuitry from the Oldest to the Emerging Non-Volatile Memories
Author 
Gastaldi, Roberto. editor. Campardo, Giovanni. editor. SpringerLink (Online service)
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ONLINE
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https://doi.org/10.1007/978-3-319-47724-4
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