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1. 
Cover image for Memory, microprocessor, and ASIC
Memory, microprocessor, and ASIC
Author 
Chen, Wai-Kai, 1936-
Preferred Shelf Number 
TK7895 .M4 V57 2003
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2. 
Cover image for Dynamic Memory Management for Embedded Systems
Dynamic Memory Management for Embedded Systems
Author 
Atienza Alonso, David. author. Mamagkakis, Stylianos. author. Poucet, Christophe. author. Peón-Quirós, Miguel. author. Bartzas, Alexandros. author.
Preferred Shelf Number 
ONLINE
Electronic Access 
https://doi.org/10.1007/978-3-319-10572-7
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3. 
Cover image for Emerging Memory Technologies Design, Architecture, and Applications
Emerging Memory Technologies Design, Architecture, and Applications
Author 
Xie, Yuan. editor. SpringerLink (Online service)
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ONLINE
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https://doi.org/10.1007/978-1-4419-9551-3
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4. 
Cover image for In-Memory Computing Hardware Accelerators for Data-Intensive Applications
In-Memory Computing Hardware Accelerators for Data-Intensive Applications
Author 
Mohammad, Baker. editor. (orcid)0000-0002-6063-473X Halawani, Yasmin. editor. SpringerLink (Online service)
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ONLINE
Electronic Access 
https://doi.org/10.1007/978-3-031-34233-2
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5. 
Cover image for High Energy Efficiency Neural Network Processor with Combined Digital and Computing-in-Memory Architecture
High Energy Efficiency Neural Network Processor with Combined Digital and Computing-in-Memory Architecture
Author 
Yue, Jinshan. author. SpringerLink (Online service)
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ONLINE
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https://doi.org/10.1007/978-981-97-3477-1
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6. 
Cover image for Processing-in-Memory for AI From Circuits to Systems
Processing-in-Memory for AI From Circuits to Systems
Author 
Kim, Joo-Young. editor. Kim, Bongjin. editor. Kim, Tony Tae-Hyoung. editor. SpringerLink (Online service)
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ONLINE
Electronic Access 
https://doi.org/10.1007/978-3-030-98781-7
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7. 
Cover image for Multi-run Memory Tests for Pattern Sensitive Faults
Multi-run Memory Tests for Pattern Sensitive Faults
Author 
Mrozek, Ireneusz. author. SpringerLink (Online service)
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ONLINE
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https://doi.org/10.1007/978-3-319-91204-2
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8. 
Cover image for Memory Controllers for Mixed-Time-Criticality Systems Architectures, Methodologies and Trade-offs
Memory Controllers for Mixed-Time-Criticality Systems Architectures, Methodologies and Trade-offs
Author 
Goossens, Sven. author. Chandrasekar, Karthik. author. Akesson, Benny. author. Goossens, Kees. author. SpringerLink (Online service)
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ONLINE
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https://doi.org/10.1007/978-3-319-32094-6
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9. 
Cover image for OpenMP: Memory, Devices, and Tasks 12th International Workshop on OpenMP, IWOMP 2016, Nara, Japan, October 5-7, 2016, Proceedings
OpenMP: Memory, Devices, and Tasks 12th International Workshop on OpenMP, IWOMP 2016, Nara, Japan, October 5-7, 2016, Proceedings
Author 
Maruyama, Naoya. editor. de Supinski, Bronis R. editor. Wahib, Mohamed. editor. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-45550-1
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10. 
Cover image for Exploring Memory Hierarchy Design with Emerging Memory Technologies
Exploring Memory Hierarchy Design with Emerging Memory Technologies
Author 
Sun, Guangyu. author. SpringerLink (Online service)
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ONLINE
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https://doi.org/10.1007/978-3-319-00681-9
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11. 
Cover image for The microprocessor : a practical introduction using the Arm Cortex-M0 processor
The microprocessor : a practical introduction using the Arm Cortex-M0 processor
Author 
Vasavada, Darshak S., author. Sinha, Sudhir Kumar, author.
Preferred Shelf Number 
TK7895 .M5 V37 2025
Electronic Access 
https://onlinelibrary.wiley.com/doi/book/10.1002/9781394245321
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12. 
Cover image for Neuromorphic Computing Principles and Organization
Neuromorphic Computing Principles and Organization
Author 
Ben Abdallah, Abderazek. author. Dang, Khanh N. author. (orcid)0000-0001-6702-3870 SpringerLink (Online service)
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https://doi.org/10.1007/978-3-031-83089-1
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