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1. 
Cover image for High-Performance Computing Using FPGAs
High-Performance Computing Using FPGAs
Author 
Vanderbauwhede, Wim. editor. Benkrid, Khaled. editor. SpringerLink (Online service)
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ONLINE(331283.1)
Electronic Access 
http://dx.doi.org/10.1007/978-1-4614-1791-0
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2. 
Cover image for Scaling OpenMP for Exascale Performance and Portability 13th International Workshop on OpenMP, IWOMP 2017, Stony Brook, NY, USA, September 20-22, 2017, Proceedings
Scaling OpenMP for Exascale Performance and Portability 13th International Workshop on OpenMP, IWOMP 2017, Stony Brook, NY, USA, September 20-22, 2017, Proceedings
Author 
de Supinski, Bronis R. editor. Olivier, Stephen L. editor. Terboven, Christian. editor. Chapman, Barbara M. editor. Müller, Matthias S. editor.
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https://doi.org/10.1007/978-3-319-65578-9
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3. 
Cover image for High Performance Computing 32nd International Conference, ISC High Performance 2017, Frankfurt, Germany, June 18-22, 2017, Proceedings
High Performance Computing 32nd International Conference, ISC High Performance 2017, Frankfurt, Germany, June 18-22, 2017, Proceedings
Author 
Kunkel, Julian M. editor. Yokota, Rio. editor. Balaji, Pavan. editor. Keyes, David. editor. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-58667-0
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4. 
Cover image for High Performance Computing ISC High Performance 2016 International Workshops, ExaComm, E-MuCoCoS, HPC-IODC, IXPUG, IWOPH, P^3MA, VHPC, WOPSSS, Frankfurt, Germany, June 19-23, 2016, Revised Selected Papers
High Performance Computing ISC High Performance 2016 International Workshops, ExaComm, E-MuCoCoS, HPC-IODC, IXPUG, IWOPH, P^3MA, VHPC, WOPSSS, Frankfurt, Germany, June 19-23, 2016, Revised Selected Papers
Author 
Taufer, Michela. editor. Mohr, Bernd. editor. Kunkel, Julian M. editor. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-46079-6
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5. 
Cover image for Dynamic Reconfiguration in Real-Time Systems Energy, Performance, and Thermal Perspectives
Dynamic Reconfiguration in Real-Time Systems Energy, Performance, and Thermal Perspectives
Author 
Wang, Weixun. author. Mishra, Prabhat. author. Ranka, Sanjay. author. SpringerLink (Online service)
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ONLINE(331237.1)
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http://dx.doi.org/10.1007/978-1-4614-0278-7
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6. 
Cover image for Design for High Performance, Low Power, and Reliable 3D Integrated Circuits
Design for High Performance, Low Power, and Reliable 3D Integrated Circuits
Author 
Lim, Sung Kyu. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-1-4419-9542-1
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7. 
Cover image for Euro-Par 2024: Parallel Processing Workshops Euro-Par 2024 International Workshops, Madrid, Spain, August 26-30, 2024, Proceedings, Part II
Euro-Par 2024: Parallel Processing Workshops Euro-Par 2024 International Workshops, Madrid, Spain, August 26-30, 2024, Proceedings, Part II
Author 
Caino-Lores, Silvina. editor. (orcid)0000-0002-6922-0138 Zeinalipour, Demetris. editor. (orcid)0000-0002-7239-2387 Doudali, Thaleia Dimitra. editor. (orcid)0000-0002-3197-839X Singh, David E. editor. (orcid)0000-0002-8125-0049 Garzón, Gracia Ester Martín. editor. (orcid)0000-0002-0568-5470
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https://doi.org/10.1007/978-3-031-90203-1
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8. 
Cover image for Euro-Par 2024: Parallel Processing Workshops Euro-Par 2024 International Workshops, Madrid, Spain, August 26-30, 2024, Proceedings, Part I
Euro-Par 2024: Parallel Processing Workshops Euro-Par 2024 International Workshops, Madrid, Spain, August 26-30, 2024, Proceedings, Part I
Author 
Caino-Lores, Silvina. editor. (orcid)0000-0002-6922-0138 Zeinalipour, Demetris. editor. (orcid)0000-0002-7239-2387 Doudali, Thaleia Dimitra. editor. (orcid)0000-0002-3197-839X Singh, David E. editor. (orcid)0000-0002-8125-0049 Garzón, Gracia Ester Martín. editor. (orcid)0000-0002-0568-5470
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https://doi.org/10.1007/978-3-031-90200-0
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9. 
Cover image for Euro-Par 2024: Parallel Processing 30th European Conference on Parallel and Distributed Processing, Madrid, Spain, August 26-30, 2024, Proceedings, Part I
Euro-Par 2024: Parallel Processing 30th European Conference on Parallel and Distributed Processing, Madrid, Spain, August 26-30, 2024, Proceedings, Part I
Author 
Carretero, Jesus. editor. (orcid)0000-0002-1413-4793 Shende, Sameer. editor. (orcid)0000-0002-2592-669X Garcia-Blas, Javier. editor. (orcid)0000-0003-1452-1918 Brandic, Ivona. editor. (orcid)0000-0001-7424-0208 Olcoz, Katzalin. editor. (orcid)0000-0002-1821-124X
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https://doi.org/10.1007/978-3-031-69577-3
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10. 
Cover image for Euro-Par 2024: Parallel Processing 30th European Conference on Parallel and Distributed Processing, Madrid, Spain, August 26-30, 2024, Proceedings, Part III
Euro-Par 2024: Parallel Processing 30th European Conference on Parallel and Distributed Processing, Madrid, Spain, August 26-30, 2024, Proceedings, Part III
Author 
Carretero, Jesus. editor. (orcid)0000-0002-1413-4793 Shende, Sameer. editor. (orcid)0000-0002-2592-669X Garcia-Blas, Javier. editor. (orcid)0000-0003-1452-1918 Brandic, Ivona. editor. (orcid)0000-0001-7424-0208 Olcoz, Katzalin. editor. (orcid)0000-0002-1821-124X
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https://doi.org/10.1007/978-3-031-69583-4
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11. 
Cover image for Introduction to Logic Circuits & Logic Design with Verilog
Introduction to Logic Circuits & Logic Design with Verilog
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LaMeres, Brock J. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-031-43946-9
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12. 
Cover image for Quick Start Guide to VHDL
Quick Start Guide to VHDL
Author 
LaMeres, Brock J. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-031-42543-1
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