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1. 
Cover image for VLSI Design and Test for Systems Dependability
VLSI Design and Test for Systems Dependability
Author 
Asai, Shojiro. editor. SpringerLink (Online service)
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ONLINE
Electronic Access 
https://doi.org/10.1007/978-4-431-56594-9
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2. 
Cover image for Test Generation of Crosstalk Delay Faults in VLSI Circuits
Test Generation of Crosstalk Delay Faults in VLSI Circuits
Author 
Jayanthy, S. author. Bhuvaneswari, M.C. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-981-13-2493-2
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3. 
Cover image for VLSI Design and Test 23rd International Symposium, VDAT 2019, Indore, India, July 4–6, 2019, Revised Selected Papers
VLSI Design and Test 23rd International Symposium, VDAT 2019, Indore, India, July 4–6, 2019, Revised Selected Papers
Author 
Sengupta, Anirban. editor. Dasgupta, Sudeb. editor. Singh, Virendra. editor. Sharma, Rohit. editor. Kumar Vishvakarma, Santosh. editor.
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Electronic Access 
https://doi.org/10.1007/978-981-32-9767-8
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4. 
Cover image for VLSI Design and Test 22nd International Symposium, VDAT 2018, Madurai, India, June 28-30, 2018, Revised Selected Papers
VLSI Design and Test 22nd International Symposium, VDAT 2018, Madurai, India, June 28-30, 2018, Revised Selected Papers
Author 
Rajaram, S. editor. Balamurugan, N.B. editor. Gracia Nirmala Rani, D. editor. Singh, Virendra. editor. SpringerLink (Online service)
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ONLINE
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https://doi.org/10.1007/978-981-13-5950-7
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5. 
Cover image for VLSI Design and Test 21st International Symposium, VDAT 2017, Roorkee, India, June 29 - July 2, 2017, Revised Selected Papers
VLSI Design and Test 21st International Symposium, VDAT 2017, Roorkee, India, June 29 - July 2, 2017, Revised Selected Papers
Author 
Kaushik, Brajesh Kumar. editor. Dasgupta, Sudeb. editor. Singh, Virendra. editor. (orcid)0000-0002-9113-5167 SpringerLink (Online service)
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https://doi.org/10.1007/978-981-10-7470-7
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6. 
Cover image for VLSI Design and Test 17th International Symposium, VDAT 2013, Jaipur, India, July 27-30, 2013, Revised Selected Papers
VLSI Design and Test 17th International Symposium, VDAT 2013, Jaipur, India, July 27-30, 2013, Revised Selected Papers
Author 
Gaur, Manoj Singh. editor. Zwolinski, Mark. editor. Laxmi, Vijay. editor. Boolchandani, Dharmendra. editor. Sing, Virendra. editor.
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ONLINE(335156.1)
Electronic Access 
http://dx.doi.org/10.1007/978-3-642-42024-5
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7. 
Cover image for Progress in VLSI Design and Test 16th International Symposium, VDAT 2012, Shibpur, India, July 1-4, 2012. Proceedings
Progress in VLSI Design and Test 16th International Symposium, VDAT 2012, Shibpur, India, July 1-4, 2012. Proceedings
Author 
Rahaman, Hafizur. editor. Chattopadhyay, Sanatan. editor. Chattopadhyay, Santanu. editor. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-3-642-31494-0
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8. 
Cover image for VLSI test principles and architectures design for testability
VLSI test principles and architectures design for testability
Author 
Wang, Laung-Terng. Wu, Cheng-Wen, EE Ph. D. Wen, Xiaoqing.
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ScienceDirect http://www.sciencedirect.com/science/book/9780123705976
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9. 
Cover image for Emerging VLSI Devices, Circuits and Architectures Proceedings of the 27th International Symposium, VDAT 2023
Emerging VLSI Devices, Circuits and Architectures Proceedings of the 27th International Symposium, VDAT 2023
Author 
Gupta, Anu. editor. Pandey, Jai Gopal. editor. (orcid)0000-0001-9937-7438 Chaturvedi, Nitin. editor. Dwivedi, Devesh. editor. SpringerLink (Online service)
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https://doi.org/10.1007/978-981-97-5269-0
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10. 
Cover image for VLSI for Embedded Intelligence Proceedings of the 27th International Symposium, VDAT 2023
VLSI for Embedded Intelligence Proceedings of the 27th International Symposium, VDAT 2023
Author 
Gupta, Anu. editor. Pandey, Jai Gopal. editor. (orcid)0000-0001-9937-7438 Chaturvedi, Nitin. editor. Dwivedi, Devesh. editor. SpringerLink (Online service)
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https://doi.org/10.1007/978-981-97-3756-7
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11. 
Cover image for Biomedical Signal and Image Processing with Artificial Intelligence
Biomedical Signal and Image Processing with Artificial Intelligence
Author 
Paunwala, Chirag. editor. Paunwala, Mita. editor. Kher, Rahul. editor. Thakkar, Falgun. editor. Kher, Heena. editor.
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https://doi.org/10.1007/978-3-031-15816-2
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12. 
Cover image for Machine learning for VLSI chip design
Machine learning for VLSI chip design
Author 
Kumar, Abhishek, editor. Tripathi, Suman Lata, editor. Srinivasa Rau, K., editor.
Preferred Shelf Number 
TK7874 .M33 2023
Electronic Access 
https://onlinelibrary.wiley.com/doi/book/10.1002/9781119910497
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