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Cover image for Integrated Circuit and System Design. Power and Timing Modeling, Optimization, and Simulation 21st International Workshop, PATMOS 2011, Madrid, Spain, September 26-29, 2011. Proceedings
Integrated Circuit and System Design. Power and Timing Modeling, Optimization, and Simulation 21st International Workshop, PATMOS 2011, Madrid, Spain, September 26-29, 2011. Proceedings
Author 
Ayala, José L. editor. García-Cámara, Braulio. editor. Prieto, Manuel. editor. Ruggiero, Martino. editor. Sicard, Gilles. editor.
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http://dx.doi.org/10.1007/978-3-642-24154-3
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Cover image for Communication architectures for systems-on-chip
Communication architectures for systems-on-chip
Author 
Ayala, Jos ̌L.
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Distributed by publisher. Purchase or institutional license may be required for access.
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