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1. 
Cover image for Designing Waveform-Processing Circuits (Analog Circuit Design Series Volume 4)
Designing Waveform-Processing Circuits (Analog Circuit Design Series Volume 4)
Author 
Feucht, D.
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ONLINE
Electronic Access 
http://dx.doi.org/10.1049/SBCS016E
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2. 
Cover image for Workload Dependent Mitigation Approaches for Performance Variability Ensuring Timing Guarantees of Integrated Circuits
Workload Dependent Mitigation Approaches for Performance Variability Ensuring Timing Guarantees of Integrated Circuits
Author 
Lin, Ji-Yung. author. Noltsis, Michalis. author. Soudris, Dimitrios. author. (orcid)0000-0002-6930-6847 Catthoor, Francky. author. SpringerLink (Online service)
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ONLINE
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https://doi.org/10.1007/978-3-031-85624-2
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3. 
Cover image for Introduction to Logic Circuits & Logic Design with VHDL
Introduction to Logic Circuits & Logic Design with VHDL
Author 
LaMeres, Brock J. author. SpringerLink (Online service)
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ONLINE
Electronic Access 
https://doi.org/10.1007/978-3-031-42547-9
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4. 
Cover image for Introduction to Logic Circuits & Logic Design with Verilog
Introduction to Logic Circuits & Logic Design with Verilog
Author 
LaMeres, Brock J. author. SpringerLink (Online service)
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ONLINE
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https://doi.org/10.1007/978-3-031-43946-9
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5. 
Cover image for Introduction to Logic Circuits & Logic Design with VHDL
Introduction to Logic Circuits & Logic Design with VHDL
Author 
LaMeres, Brock J. author. SpringerLink (Online service)
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ONLINE
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https://doi.org/10.1007/978-3-030-12489-2
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6. 
Cover image for Introduction to Logic Circuits & Logic Design with Verilog
Introduction to Logic Circuits & Logic Design with Verilog
Author 
LaMeres, Brock J. author. SpringerLink (Online service)
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ONLINE
Electronic Access 
https://doi.org/10.1007/978-3-030-13605-5
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7. 
Cover image for Simulation and Optimization of Digital Circuits Considering and Mitigating Destabilizing Factors
Simulation and Optimization of Digital Circuits Considering and Mitigating Destabilizing Factors
Author 
Melikyan, Vazgen. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-71637-4
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8. 
Cover image for Introduction to Logic Circuits & Logic Design with Verilog
Introduction to Logic Circuits & Logic Design with Verilog
Author 
LaMeres, Brock J. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-53883-9
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9. 
Cover image for Introduction to Logic Circuits & Logic Design with VHDL
Introduction to Logic Circuits & Logic Design with VHDL
Author 
LaMeres, Brock J. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-34195-8
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10. 
Cover image for Testing of Interposer-Based 2.5D Integrated Circuits
Testing of Interposer-Based 2.5D Integrated Circuits
Author 
Wang, Ran. author. Chakrabarty, Krishnendu. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-54714-5
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11. 
Cover image for Design, Analysis and Test of Logic Circuits Under Uncertainty
Design, Analysis and Test of Logic Circuits Under Uncertainty
Author 
Krishnaswamy, Smita. author. Markov, Igor L. author. Hayes, John P. author. SpringerLink (Online service)
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ONLINE(335669.1)
Electronic Access 
http://dx.doi.org/10.1007/978-90-481-9644-9
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12. 
Cover image for Regular Nanofabrics in Emerging Technologies Design and Fabrication Methods for Nanoscale Digital Circuits
Regular Nanofabrics in Emerging Technologies Design and Fabrication Methods for Nanoscale Digital Circuits
Author 
Ben Jamaa, M. Haykel. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-94-007-0650-7
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