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Cover image for Introduction to Embedded System Design Using Field Programmable Gate Arrays
Introduction to Embedded System Design Using Field Programmable Gate Arrays
Author 
Dubey, Rahul. author. SpringerLink (Online service)
Preferred Shelf Number 
ONLINE
Electronic Access 
http://dx.doi.org/10.1007/978-1-84882-016-6
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2. 
Cover image for Logic synthesis for FPGA-based mealy finite state machines : structural decomposition in logic design
Logic synthesis for FPGA-based mealy finite state machines : structural decomposition in logic design
Author 
Barkalov, Alexander, author.
Preferred Shelf Number 
TK7868 .L6
Electronic Access 
Taylor & Francis https://www.taylorfrancis.com/books/9781003536734
OCLC metadata license agreement http://www.oclc.org/content/dam/oclc/forms/terms/vbrl-201703.pdf
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3. 
Cover image for Separation Logic for High-level Synthesis
Separation Logic for High-level Synthesis
Author 
Winterstein, Felix. author. SpringerLink (Online service)
Preferred Shelf Number 
ONLINE
Electronic Access 
https://doi.org/10.1007/978-3-319-53222-6
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4. 
Cover image for High Performance Integer Arithmetic Circuit Design on FPGA Architecture, Implementation and Design Automation
High Performance Integer Arithmetic Circuit Design on FPGA Architecture, Implementation and Design Automation
Author 
Palchaudhuri, Ayan. author. Chakraborty, Rajat Subhra. author. SpringerLink (Online service)
Preferred Shelf Number 
ONLINE
Electronic Access 
https://doi.org/10.1007/978-81-322-2520-1
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