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Cover image for Euro-Par 2018: Parallel Processing Workshops Euro-Par 2018 International Workshops, Turin, Italy, August 27-28, 2018, Revised Selected Papers
Euro-Par 2018: Parallel Processing Workshops Euro-Par 2018 International Workshops, Turin, Italy, August 27-28, 2018, Revised Selected Papers
Author 
Mencagli, Gabriele. editor. B. Heras, Dora. editor. Cardellini, Valeria. editor. Casalicchio, Emiliano. editor. Jeannot, Emmanuel. editor.
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https://doi.org/10.1007/978-3-030-10549-5
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2. 
Cover image for Beyond-CMOS Technologies for Next Generation Computer Design
Beyond-CMOS Technologies for Next Generation Computer Design
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Topaloglu, Rasit O. editor. Wong, H.-S. Philip. editor. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-90385-9
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3. 
Cover image for Introduction to Digital Systems Design
Introduction to Digital Systems Design
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Donzellini, Giuliano. author. Oneto, Luca. author. Ponta, Domenico. author. Anguita, Davide. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-92804-3
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4. 
Cover image for Harnessing Performance Variability in Embedded and High-performance Many/Multi-core Platforms A Cross-layer Approach
Harnessing Performance Variability in Embedded and High-performance Many/Multi-core Platforms A Cross-layer Approach
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Fornaciari, William. editor. Soudris, Dimitrios. editor. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-91962-1
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5. 
Cover image for Euro-Par 2019: Parallel Processing 25th International Conference on Parallel and Distributed Computing, Göttingen, Germany, August 26–30, 2019, Proceedings
Euro-Par 2019: Parallel Processing 25th International Conference on Parallel and Distributed Computing, Göttingen, Germany, August 26–30, 2019, Proceedings
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Yahyapour, Ramin. editor. (orcid)0000-0002-9057-4395 SpringerLink (Online service)
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https://doi.org/10.1007/978-3-030-29400-7
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6. 
Cover image for Computer Science – CACIC 2018 24th Argentine Congress, Tandil, Argentina, October 8–12, 2018, Revised Selected Papers
Computer Science – CACIC 2018 24th Argentine Congress, Tandil, Argentina, October 8–12, 2018, Revised Selected Papers
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Pesado, Patricia. editor. (orcid)0000-0003-0000-3482 Aciti, Claudio. editor. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-030-20787-8
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7. 
Cover image for OpenMP: Conquering the Full Hardware Spectrum 15th International Workshop on OpenMP, IWOMP 2019, Auckland, New Zealand, September 11–13, 2019, Proceedings
OpenMP: Conquering the Full Hardware Spectrum 15th International Workshop on OpenMP, IWOMP 2019, Auckland, New Zealand, September 11–13, 2019, Proceedings
Author 
Fan, Xing. editor. de Supinski, Bronis R. editor. Sinnen, Oliver. editor. Giacaman, Nasser. editor. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-030-28596-8
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8. 
Cover image for Advanced HDL Synthesis and SOC Prototyping RTL Design Using Verilog
Advanced HDL Synthesis and SOC Prototyping RTL Design Using Verilog
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Taraate, Vaibbhav. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-981-10-8776-9
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9. 
Cover image for Software Architecture 13th European Conference, ECSA 2019, Paris, France, September 9–13, 2019, Proceedings
Software Architecture 13th European Conference, ECSA 2019, Paris, France, September 9–13, 2019, Proceedings
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Bures, Tomas. editor. Duchien, Laurence. editor. (orcid)0000-0002-4517-5862 Inverardi, Paola. editor. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-030-29983-5
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10. 
Cover image for Introduction to Logic Circuits & Logic Design with VHDL
Introduction to Logic Circuits & Logic Design with VHDL
Author 
LaMeres, Brock J. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-030-12489-2
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11. 
Cover image for VLSI-SoC: Design and Engineering of Electronics Systems Based on New Computing Paradigms 26th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2018, Verona, Italy, October 8–10, 2018, Revised and Extended Selected Papers
VLSI-SoC: Design and Engineering of Electronics Systems Based on New Computing Paradigms 26th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2018, Verona, Italy, October 8–10, 2018, Revised and Extended Selected Papers
Author 
Bombieri, Nicola. editor. Pravadelli, Graziano. editor. Fujita, Masahiro. editor. Austin, Todd. editor. Reis, Ricardo. editor.
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https://doi.org/10.1007/978-3-030-23425-6
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12. 
Cover image for Programming and Performance Visualization Tools International Workshops, ESPT 2017 and VPA 2017, Denver, CO, USA, November 12 and 17, 2017, and ESPT 2018 and VPA 2018, Dallas, TX, USA, November 16 and 11, 2018, Revised Selected Papers
Programming and Performance Visualization Tools International Workshops, ESPT 2017 and VPA 2017, Denver, CO, USA, November 12 and 17, 2017, and ESPT 2018 and VPA 2018, Dallas, TX, USA, November 16 and 11, 2018, Revised Selected Papers
Author 
Bhatele, Abhinav. editor. (orcid)0000-0003-3069-3701 Boehme, David. editor. Levine, Joshua A. editor. Malony, Allen D. editor. Schulz, Martin. editor.
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https://doi.org/10.1007/978-3-030-17872-7
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