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1. 
Cover image for Emerging Electronic Devices, Circuits and Systems Select Proceedings of EEDCS Workshop Held in Conjunction with ISDCS 2022
Emerging Electronic Devices, Circuits and Systems Select Proceedings of EEDCS Workshop Held in Conjunction with ISDCS 2022
Author 
Giri, Chandan. editor. Iizuka, Takahiro. editor. Rahaman, Hafizur. editor. Bhattacharya, Bhargab B. editor. SpringerLink (Online service)
Preferred Shelf Number 
ONLINE
Electronic Access 
https://doi.org/10.1007/978-981-99-0055-8
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2. 
Cover image for Applied formal verification
Applied formal verification
Author 
Perry, Douglas L. Foster, Harry, 1956-
Preferred Shelf Number 
ONLINE
Electronic Access 
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3. 
Cover image for Digital system verification a combined formal methods and simulation framework
Digital system verification a combined formal methods and simulation framework
Author 
Li, Lun, 1970- Thornton, Mitchell Aaron.
Preferred Shelf Number 
ONLINE
Electronic Access 
EBSCOhost http://search.ebscohost.com/login.aspx?direct=true&scope=site&db=nlebk&db=nlabk&AN=440373
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4. 
Cover image for Practical Design Verification
Practical Design Verification
Author 
Pradhan, Dhiraj K.. Harris, Ian G..
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ONLINE
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5. 
Cover image for Verification techniques for system-level design
Verification techniques for system-level design
Author 
Fujita, Masahiro, 1956- Ghosh, Indradeep, 1970- Prasad, Mukul.
Preferred Shelf Number 
ONLINE
Electronic Access 
ScienceDirect http://www.sciencedirect.com/science/book/9780123706164
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6. 
Cover image for Verification of systems and circuits using LOTOS, Petri Nets, and CCS
Verification of systems and circuits using LOTOS, Petri Nets, and CCS
Author 
Yoeli, Michael, 1917- Kol, Rakefet.
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ONLINE
Electronic Access 
Available by subscription from Safari Books Online
Contributor biographical information http://catdir.loc.gov/catdir/enhancements/fy0809/2007033487-b.html
John Wiley http://dx.doi.org/10.1002/9780470253410
Volltext http://proquest.tech.safaribooksonline.de/9780471704492
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7. 
Cover image for EDA for IC system design, verification, and testing
EDA for IC system design, verification, and testing
Author 
Lavagno, Luciano, 1959- Martin, Grant (Grant Edmund) Scheffer, Louis Kossuth.
Preferred Shelf Number 
TK7874 .E26 2006
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8. 
Cover image for Co-verification of hardware and software for ARM SoC design
Co-verification of hardware and software for ARM SoC design
Author 
Andrews, Jason R.
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ONLINE
Electronic Access 
ScienceDirect http://www.sciencedirect.com/science/book/9780750677301
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9. 
Cover image for Principles of functional verification
Principles of functional verification
Author 
Meyer, Andreas (Andreas S.)
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ONLINE
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ScienceDirect http://www.sciencedirect.com/science/book/9780750676175
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10. 
Cover image for Trace theory for automatic hierarchical verification of speed-independent circuits
Trace theory for automatic hierarchical verification of speed-independent circuits
Author 
Dill, David L.
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ONLINE
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IEEE Xplore http://ieeexplore.ieee.org/xpl/bkabstractplus.jsp?bkn=6267249
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