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1. 
Cover image for Embedded multiprocessors scheduling and synchronization
Embedded multiprocessors scheduling and synchronization
Author 
Sriram, Sundararajan, 1968- Bhattacharyya, Shuvra S., 1968-
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ONLINE
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2. 
Cover image for Functional programming for loosely-coupled multiprocessors
Functional programming for loosely-coupled multiprocessors
Author 
Kelly, Paul (Paul H. J.)
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ONLINE
Electronic Access 
IEEE Xplore http://ieeexplore.ieee.org/xpl/bkabstractplus.jsp?bkn=6267295
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3. 
Cover image for Multicore technology : architecture, reconfiguration, and modeling
Multicore technology : architecture, reconfiguration, and modeling
Author 
Samgwine, Stephen J., editor. Qadri, Muhammad Yasir, editor.
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4. 
Cover image for Fundamentals of multicore software development
Fundamentals of multicore software development
Author 
Pankratius, Victor. Adl-Tabatabai, Ali-Reza. Tichy, Walter F.
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ONLINE
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5. 
Cover image for Scientific computing with multicore and accelerators
Scientific computing with multicore and accelerators
Author 
Kurzak, Jakub. Bader, David A. Dongarra, J. J.
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6. 
Cover image for Multi-core embedded systems
Multi-core embedded systems
Author 
Kornaros, Georgios.
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7. 
Cover image for Programming massively parallel processors hands-on with CUDA
Programming massively parallel processors hands-on with CUDA
Author 
Kirk, David. Hwu, Wen-mei.
Preferred Shelf Number 
QA76.642 K57 2010
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8. 
Cover image for Introduction to scheduling
Introduction to scheduling
Author 
Robert, Yves, 1938- Vivien, Frďřic.
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9. 
Cover image for Software development for embedded multi-core systems a practical guide using embedded Intel architecture
Software development for embedded multi-core systems a practical guide using embedded Intel architecture
Author 
Domeika, Max.
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Electronic Access 
ScienceDirect http://www.sciencedirect.com/science/book/9780750685399
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10. 
Cover image for Principles and practices of interconnection networks
Principles and practices of interconnection networks
Author 
Dally, William J. Towles, Brian.
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ONLINE
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EBSCOhost http://search.ebscohost.com/login.aspx?direct=true&scope=site&db=nlebk&db=nlabk&AN=195195
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11. 
Cover image for Domain-specific processors : systems, architectures, modeling, and simulation
Domain-specific processors : systems, architectures, modeling, and simulation
Author 
Bhattacharyya, Shuvra S. Deprettere, Ed. F. Teich, Jürgen.
Preferred Shelf Number 
TK7895.E42 D66 2004
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12. 
Cover image for Domain-specific processors systems, architectures, modeling, and simulation
Domain-specific processors systems, architectures, modeling, and simulation
Author 
Bhattacharyya, Shuvra S., 1968- Deprettere, Ed. F., 1944- Teich, J¿rgen, 1964-
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