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1. 
Cover image for Advanced Flip Chip Packaging
Advanced Flip Chip Packaging
Author 
Tong, Ho-Ming. editor. Lai, Yi-Shao. editor. Wong, C.P. editor. SpringerLink (Online service)
Preferred Shelf Number 
ONLINE(330808.1)
Electronic Access 
http://dx.doi.org/10.1007/978-1-4419-5768-9
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2. 
Cover image for Reconfigurable Networks-on-Chip
Reconfigurable Networks-on-Chip
Author 
Chen, Sao-Jie. author. Lan, Ying-Cherng. author. Tsai, Wen-Chung. author. Hu, Yu-Hen. author. SpringerLink (Online service)
Preferred Shelf Number 
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Electronic Access 
http://dx.doi.org/10.1007/978-1-4419-9341-0
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3. 
Cover image for On-Chip Power Delivery and Management
On-Chip Power Delivery and Management
Author 
Vaisband, Inna P. author. Jakushokas, Renatas. author. Popovich, Mikhail. author. Mezhiba, Andrey V. author. Köse, Selçuk. author.
Preferred Shelf Number 
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Electronic Access 
https://doi.org/10.1007/978-3-319-29395-0
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4. 
Cover image for Photonic Network-on-Chip Design
Photonic Network-on-Chip Design
Author 
Bergman, Keren. author. Carloni, Luca P. author. Biberman, Aleksandr. author. Chan, Johnnie. author. Hendry, Gilbert. author.
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https://doi.org/10.1007/978-1-4419-9335-9
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5. 
Cover image for Routing Algorithms in Networks-on-Chip
Routing Algorithms in Networks-on-Chip
Author 
Palesi, Maurizio. editor. Daneshtalab, Masoud. editor. SpringerLink (Online service)
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Electronic Access 
https://doi.org/10.1007/978-1-4614-8274-1
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6. 
Cover image for On-chip High-Voltage Generator Design
On-chip High-Voltage Generator Design
Author 
Tanzawa, Toru. author. SpringerLink (Online service)
Preferred Shelf Number 
ONLINE(331384.1)
Electronic Access 
http://dx.doi.org/10.1007/978-1-4614-3849-6
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7. 
Cover image for Variation Tolerant On-Chip Interconnects
Variation Tolerant On-Chip Interconnects
Author 
Nigussie, Ethiopia Enideg. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-1-4614-0131-5
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8. 
Cover image for Ultra-thin Chip Technology and Applications
Ultra-thin Chip Technology and Applications
Author 
Burghartz, Joachim. editor. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-1-4419-7276-7
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9. 
Cover image for Low Power Networks-on-Chip
Low Power Networks-on-Chip
Author 
Silvano, Cristina. editor. Lajolo, Marcello. editor. Palermo, Gianluca. editor. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-1-4419-6911-8
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10. 
Cover image for Processor and System-on-Chip Simulation
Processor and System-on-Chip Simulation
Author 
Leupers, Rainer. editor. Temam, Olivier. editor. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-1-4419-6175-4
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11. 
Cover image for Full-Chip Nanometer Routing Techniques
Full-Chip Nanometer Routing Techniques
Author 
Ho, Tsung-Yi. author. Chang, Yao-Wen. author. Chen, Sao-Jie. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-1-4020-6195-0
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12. 
Cover image for Pipelined Multiprocessor System-on-Chip for Multimedia
Pipelined Multiprocessor System-on-Chip for Multimedia
Author 
Javaid, Haris. author. Parameswaran, Sri. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-3-319-01113-4
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