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1. 
Cover image for Intel microprocessors
Intel microprocessors
Author 
Brey, Barry B.
Preferred Shelf Number 
QA76.8.I2674 B74 2014
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Beytepe Library~1
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2. 
Cover image for Network processor design issues and practices
Network processor design issues and practices
Author 
Crowley, Patrick, 1974-
Preferred Shelf Number 
ONLINE
Electronic Access 
ScienceDirect http://www.sciencedirect.com/science/book/9781558608757
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3. 
Cover image for Emerging Memory Technologies Design, Architecture, and Applications
Emerging Memory Technologies Design, Architecture, and Applications
Author 
Xie, Yuan. editor. SpringerLink (Online service)
Preferred Shelf Number 
ONLINE
Electronic Access 
https://doi.org/10.1007/978-1-4419-9551-3
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4. 
Cover image for Turbo Decoder Architecture for Beyond-4G Applications
Turbo Decoder Architecture for Beyond-4G Applications
Author 
Wong, Cheng-Chi. author. Chang, Hsie-Chia. author. SpringerLink (Online service)
Preferred Shelf Number 
ONLINE
Electronic Access 
https://doi.org/10.1007/978-1-4614-8310-6
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5. 
Cover image for Correct-by-Construction Approaches for SoC Design
Correct-by-Construction Approaches for SoC Design
Author 
Sinha, Roopak. author. Roop, Parthasarathi. author. Basu, Samik. author. SpringerLink (Online service)
Preferred Shelf Number 
ONLINE
Electronic Access 
https://doi.org/10.1007/978-1-4614-7864-5
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6. 
Cover image for Routing Algorithms in Networks-on-Chip
Routing Algorithms in Networks-on-Chip
Author 
Palesi, Maurizio. editor. Daneshtalab, Masoud. editor. SpringerLink (Online service)
Preferred Shelf Number 
ONLINE
Electronic Access 
https://doi.org/10.1007/978-1-4614-8274-1
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7. 
Cover image for Architectures for Baseband Signal Processing
Architectures for Baseband Signal Processing
Author 
Kienle, Frank. author. SpringerLink (Online service)
Preferred Shelf Number 
ONLINE
Electronic Access 
https://doi.org/10.1007/978-1-4614-8030-3
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8. 
Cover image for Design-for-Test and Test Optimization Techniques for TSV-based 3D Stacked ICs
Design-for-Test and Test Optimization Techniques for TSV-based 3D Stacked ICs
Author 
Noia, Brandon. author. Chakrabarty, Krishnendu. author. SpringerLink (Online service)
Preferred Shelf Number 
ONLINE
Electronic Access 
https://doi.org/10.1007/978-3-319-02378-6
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9. 
Cover image for Smart Multicore Embedded Systems
Smart Multicore Embedded Systems
Author 
Torquati, Massimo. editor. (orcid)0000-0001-6323-3459 Bertels, Koen. editor. Karlsson, Sven. editor. Pacull, François. editor. SpringerLink (Online service)
Preferred Shelf Number 
ONLINE
Electronic Access 
https://doi.org/10.1007/978-1-4614-8800-2
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10. 
Cover image for Programming Heterogeneous MPSoCs Tool Flows to Close the Software Productivity Gap
Programming Heterogeneous MPSoCs Tool Flows to Close the Software Productivity Gap
Author 
Castrillón Mazo, Jerónimo. author. Leupers, Rainer. author. SpringerLink (Online service)
Preferred Shelf Number 
ONLINE
Electronic Access 
https://doi.org/10.1007/978-3-319-00675-8
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11. 
Cover image for High-Performance Computing on the Intel® Xeon Phi™ How to Fully Exploit MIC Architectures
High-Performance Computing on the Intel® Xeon Phi™ How to Fully Exploit MIC Architectures
Author 
Wang, Endong. author. Zhang, Qing. author. Shen, Bo. author. Zhang, Guangyong. author. Lu, Xiaowei. author.
Preferred Shelf Number 
ONLINE
Electronic Access 
https://doi.org/10.1007/978-3-319-06486-4
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12. 
Cover image for Exploring Memory Hierarchy Design with Emerging Memory Technologies
Exploring Memory Hierarchy Design with Emerging Memory Technologies
Author 
Sun, Guangyu. author. SpringerLink (Online service)
Preferred Shelf Number 
ONLINE
Electronic Access 
https://doi.org/10.1007/978-3-319-00681-9
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