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1. 
Cover image for High Energy Efficiency Neural Network Processor with Combined Digital and Computing-in-Memory Architecture
High Energy Efficiency Neural Network Processor with Combined Digital and Computing-in-Memory Architecture
Author 
Yue, Jinshan. author. SpringerLink (Online service)
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ONLINE
Electronic Access 
https://doi.org/10.1007/978-981-97-3477-1
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2. 
Cover image for In-Memory Computing Hardware Accelerators for Data-Intensive Applications
In-Memory Computing Hardware Accelerators for Data-Intensive Applications
Author 
Mohammad, Baker. editor. (orcid)0000-0002-6063-473X Halawani, Yasmin. editor. SpringerLink (Online service)
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ONLINE
Electronic Access 
https://doi.org/10.1007/978-3-031-34233-2
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3. 
Cover image for Memory Controllers for Mixed-Time-Criticality Systems Architectures, Methodologies and Trade-offs
Memory Controllers for Mixed-Time-Criticality Systems Architectures, Methodologies and Trade-offs
Author 
Goossens, Sven. author. Chandrasekar, Karthik. author. Akesson, Benny. author. Goossens, Kees. author. SpringerLink (Online service)
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ONLINE
Electronic Access 
https://doi.org/10.1007/978-3-319-32094-6
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