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1. 
Cover image for High Performance Integer Arithmetic Circuit Design on FPGA Architecture, Implementation and Design Automation
High Performance Integer Arithmetic Circuit Design on FPGA Architecture, Implementation and Design Automation
Author 
Palchaudhuri, Ayan. author. Chakraborty, Rajat Subhra. author. SpringerLink (Online service)
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ONLINE
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https://doi.org/10.1007/978-81-322-2520-1
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2. 
Cover image for Adiabatic Logic Future Trend and System Level Perspective
Adiabatic Logic Future Trend and System Level Perspective
Author 
Teichmann, Philip. author. SpringerLink (Online service)
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http://dx.doi.org/10.1007/978-94-007-2345-0
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3. 
Cover image for Software Defined Chips Volume II
Software Defined Chips Volume II
Author 
Liu, Leibo. author. Wei, Shaojun. author. Zhu, Jianfeng. author. Deng, Chenchen. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-981-19-7636-0
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4. 
Cover image for Digital Logic Design Using Verilog Coding and RTL Synthesis
Digital Logic Design Using Verilog Coding and RTL Synthesis
Author 
Taraate, Vaibbhav. author. SpringerLink (Online service)
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https://doi.org/10.1007/978-81-322-2791-5
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5. 
Cover image for Advanced signal integrity for high-speed digital designs
Advanced signal integrity for high-speed digital designs
Author 
Hall, Stephen H. Heck, Howard L.
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IEEE Xplore http://ieeexplore.ieee.org/xpl/bkabstractplus.jsp?bkn=5361024
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