Search Results for - Narrowed by: Bergeron, Janick. author. - Engineering. - Systems engineering.
SirsiDynix Enterprise
https://katalog.hacettepe.edu.tr/client/en_US/default/default/qf$003dAUTHOR$002509Author$002509Bergeron$00252C$002bJanick.$002bauthor.$002509Bergeron$00252C$002bJanick.$002bauthor.$0026qf$003dSUBJECT$002509Subject$002509Engineering.$002509Engineering.$0026qf$003dSUBJECT$002509Subject$002509Systems$002bengineering.$002509Systems$002bengineering.$0026ic$003dtrue$0026te$003dILS$0026rt$003dfalse$00257C$00257C$00257CISBN$00257C$00257C$00257CISBN$0026ps$003d300$0026isd$003dtrue?
2024-08-26T20:42:07Z
Verification Methodology Manual for SystemVerilog
ent://SD_ILS/0/SD_ILS:165150
2024-08-26T20:42:07Z
2024-08-26T20:42:07Z
Author Bergeron, Janick. author. Cerny, Eduard. author. Hunter, Alan. author. Nightingale, Andrew. author. SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="http://dx.doi.org/10.1007/b135575">http://dx.doi.org/10.1007/b135575</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>
Writing Testbenches using System Verilog
ent://SD_ILS/0/SD_ILS:165809
2024-08-26T20:42:07Z
2024-08-26T20:42:07Z
Author Bergeron, Janick. author. SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="http://dx.doi.org/10.1007/0-387-31275-7">http://dx.doi.org/10.1007/0-387-31275-7</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>