Search Results for -- UYGARLIK, ORTAÇAĞ, EDEBİYATTA. - Narrowed by: Ayala, José L. editor. - Logic design.
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2024-09-10T15:45:12Z
Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation 22nd International Workshop, PATMOS 2012, Newcastle upon Tyne, UK, September 4-6, 2012, Revised Selected Papers
ent://SD_ILS/0/SD_ILS:334136
2024-09-10T15:45:12Z
2024-09-10T15:45:12Z
Author Ayala, José L. editor. Shang, Delong. editor. Yakovlev, Alex. editor. SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE(334136.1)<br/>Electronic Access <a href="http://dx.doi.org/10.1007/978-3-642-36157-9">http://dx.doi.org/10.1007/978-3-642-36157-9</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>
Integrated Circuit and System Design. Power and Timing Modeling, Optimization, and Simulation 21st International Workshop, PATMOS 2011, Madrid, Spain, September 26-29, 2011. Proceedings
ent://SD_ILS/0/SD_ILS:195562
2024-09-10T15:45:12Z
2024-09-10T15:45:12Z
Author Ayala, José L. editor. García-Cámara, Braulio. editor. Prieto, Manuel. editor. Ruggiero, Martino. editor. Sicard, Gilles. editor.<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="http://dx.doi.org/10.1007/978-3-642-24154-3">http://dx.doi.org/10.1007/978-3-642-24154-3</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>