Search Results for -- UYGARLIK, ORTAÇAĞ, EDEBİYATTA. - Narrowed by: SpringerLink (Online service) - Electronics. - Logic design.
SirsiDynix Enterprise
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2024-09-10T16:02:28Z
Principles and Structures of FPGAs
ent://SD_ILS/0/SD_ILS:399651
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Author Amano, Hideharu. editor. SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="https://doi.org/10.1007/978-981-13-0824-6">https://doi.org/10.1007/978-981-13-0824-6</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>
Entwurf integrierter 3D-Systeme der Elektronik
ent://SD_ILS/0/SD_ILS:196921
2024-09-10T16:02:28Z
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Author Lienig, Jens. editor. Dietrich, Manfred. editor. SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="http://dx.doi.org/10.1007/978-3-642-30572-6">http://dx.doi.org/10.1007/978-3-642-30572-6</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>
Adiabatic Logic Future Trend and System Level Perspective
ent://SD_ILS/0/SD_ILS:206336
2024-09-10T16:02:28Z
2024-09-10T16:02:28Z
Author Teichmann, Philip. author. SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="http://dx.doi.org/10.1007/978-94-007-2345-0">http://dx.doi.org/10.1007/978-94-007-2345-0</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>
VLSI Physical Design: From Graph Partitioning to Timing Closure
ent://SD_ILS/0/SD_ILS:205534
2024-09-10T16:02:28Z
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Author Kahng, Andrew B. author. Lienig, Jens. author. Markov, Igor L. author. Hu, Jin. author. SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="http://dx.doi.org/10.1007/978-90-481-9591-6">http://dx.doi.org/10.1007/978-90-481-9591-6</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>
More than Moore Creating High Value Micro/Nanoelectronics Systems
ent://SD_ILS/0/SD_ILS:167281
2024-09-10T16:02:28Z
2024-09-10T16:02:28Z
Author Zhang, Guo Qi. editor. Roosmalen, Alfred. editor. SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="http://dx.doi.org/10.1007/978-0-387-75593-9">http://dx.doi.org/10.1007/978-0-387-75593-9</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>
Logic Synthesis for FSM-Based Control Units
ent://SD_ILS/0/SD_ILS:190905
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2024-09-10T16:02:28Z
Author Barkalov, Alexander. author. Titarenko, Larysa. author. SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="http://dx.doi.org/10.1007/978-3-642-04309-3">http://dx.doi.org/10.1007/978-3-642-04309-3</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>
Logic Synthesis for Compositional Microprogram Control Units
ent://SD_ILS/0/SD_ILS:185766
2024-09-10T16:02:28Z
2024-09-10T16:02:28Z
Author Barkalov, Alexander. editor. Titarenko, Larysa. editor. SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="http://dx.doi.org/10.1007/978-3-540-69285-0">http://dx.doi.org/10.1007/978-3-540-69285-0</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>
A Roadmap for Formal Property Verification
ent://SD_ILS/0/SD_ILS:169271
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Author DasGupta, Pallab. author. SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="http://dx.doi.org/10.1007/978-1-4020-4758-9">http://dx.doi.org/10.1007/978-1-4020-4758-9</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>
Layoutsynthese elektronischer Schaltungen — Grundlegende Algorithmen für die Entwurfsautomatisierung
ent://SD_ILS/0/SD_ILS:182190
2024-09-10T16:02:28Z
2024-09-10T16:02:28Z
Author Lienig, Jens. author. SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="http://dx.doi.org/10.1007/3-540-29942-4">http://dx.doi.org/10.1007/3-540-29942-4</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>
Fault-Tolerance Techniques for SRAM-based FPGAs
ent://SD_ILS/0/SD_ILS:165779
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Author Kastensmidt, Fernanda Lima. author. Carro, Luigi. author. Reis, Ricardo. author. SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="http://dx.doi.org/10.1007/978-0-387-31069-5">http://dx.doi.org/10.1007/978-0-387-31069-5</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>
Logischer Entwurf digitaler Systeme
ent://SD_ILS/0/SD_ILS:182032
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Author Liebig, Hans. author. SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="http://dx.doi.org/10.1007/3-540-29430-9">http://dx.doi.org/10.1007/3-540-29430-9</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>
New Algorithms, Architectures and Applications for Reconfigurable Computing
ent://SD_ILS/0/SD_ILS:168817
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Author Lysaght, Patrick. editor. Rosenstiel, Wolfgang. editor. SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="http://dx.doi.org/10.1007/1-4020-3128-9">http://dx.doi.org/10.1007/1-4020-3128-9</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>
Taxonomies for the Development and Verification of Digital Systems
ent://SD_ILS/0/SD_ILS:165002
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Author Bailey, Brian. editor. Martin, Grant. editor. Anderson, Thomas. editor. SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="http://dx.doi.org/10.1007/b104217">http://dx.doi.org/10.1007/b104217</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>