Search Results for -- UYGARLIK, ORTAÇAĞ, EDEBİYATTA. - Narrowed by: Svensson, Lars. editor. - Logic design. - Systems engineering.
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2024-09-10T16:30:58Z
Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation 18th International Workshop, PATMOS 2008, Lisbon, Portugal, September 10-12, 2008. Revised Selected Papers
ent://SD_ILS/0/SD_ILS:189565
2024-09-10T16:30:58Z
2024-09-10T16:30:58Z
Author Svensson, Lars. editor. Monteiro, José. editor. SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="http://dx.doi.org/10.1007/978-3-540-95948-9">http://dx.doi.org/10.1007/978-3-540-95948-9</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>
Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation 17th International Workshop, PATMOS 2007, Gothenburg, Sweden, September 3-5, 2007. Proceedings
ent://SD_ILS/0/SD_ILS:187155
2024-09-10T16:30:58Z
2024-09-10T16:30:58Z
Author Azémard, Nadine. editor. Svensson, Lars. editor. SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="http://dx.doi.org/10.1007/978-3-540-74442-9">http://dx.doi.org/10.1007/978-3-540-74442-9</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>