Search Results for -- UYGARLIK, ORTAÇAĞ, EDEBİYATTA. - Narrowed by: Computer hardware. - Logic design.SirsiDynix Enterprisehttps://katalog.hacettepe.edu.tr/client/en_US/default/default/qu$003d--$002bUYGARLIK$00252C$002bORTA$0025C3$002587A$0025C4$00259E$00252C$002bEDEB$0025C4$0025B0YATTA.$0026qf$003dSUBJECT$002509Subject$002509Computer$002bhardware.$002509Computer$002bhardware.$0026qf$003dSUBJECT$002509Subject$002509Logic$002bdesign.$002509Logic$002bdesign.$0026ic$003dtrue$0026te$003dILS$0026ps$003d300?dt=list2024-08-12T12:07:35ZTools and Algorithms for the Construction and Analysis of Systems 24th International Conference, TACAS 2018, Held as Part of the European Joint Conferences on Theory and Practice of Software, ETAPS 2018, Thessaloniki, Greece, April 14-20, 2018, Proceedings, Part IIent://SD_ILS/0/SD_ILS:4006412024-08-12T12:07:35Z2024-08-12T12:07:35ZAuthor Beyer, Dirk. editor. (orcid)0000-0003-4832-7662 Huisman, Marieke. editor. SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="https://doi.org/10.1007/978-3-319-89963-3">https://doi.org/10.1007/978-3-319-89963-3</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>Computer Safety, Reliability, and Security SAFECOMP 2018 Workshops, ASSURE, DECSoS, SASSUR, STRIVE, and WAISE, Västerås, Sweden, September 18, 2018, Proceedingsent://SD_ILS/0/SD_ILS:3997832024-08-12T12:07:35Z2024-08-12T12:07:35ZAuthor Gallina, Barbara. editor. (orcid)0000-0002-6952-1053 Skavhaug, Amund. editor. Schoitsch, Erwin. editor. (orcid)0000-0002-0335-5443 Bitsch, Friedemann. editor. (orcid)0000-0001-6152-4121 SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="https://doi.org/10.1007/978-3-319-99229-7">https://doi.org/10.1007/978-3-319-99229-7</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>Software Engineering and Formal Methods SEFM 2017 Collocated Workshops: DataMod, FAACS, MSE, CoSim-CPS, and FOCLASA, Trento, Italy, September 4-5, 2017, Revised Selected Papersent://SD_ILS/0/SD_ILS:4025222024-08-12T12:07:35Z2024-08-12T12:07:35ZAuthor Cerone, Antonio. editor. (orcid)0000-0003-2691-5279 Roveri, Marco. editor. (orcid)0000-0001-9483-3940 SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="https://doi.org/10.1007/978-3-319-74781-1">https://doi.org/10.1007/978-3-319-74781-1</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>Reliable Software Technologies – Ada-Europe 2018 23rd Ada-Europe International Conference on Reliable Software Technologies, Lisbon, Portugal, June 18-22, 2018, Proceedingsent://SD_ILS/0/SD_ILS:4001462024-08-12T12:07:35Z2024-08-12T12:07:35ZAuthor Casimiro, António. editor. (orcid)0000-0002-5522-5739 Ferreira, Pedro M. editor. (orcid)0000-0003-2369-0115 SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="https://doi.org/10.1007/978-3-319-92432-8">https://doi.org/10.1007/978-3-319-92432-8</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>Design, Analysis and Test of Logic Circuits Under Uncertaintyent://SD_ILS/0/SD_ILS:3356692024-08-12T12:07:35Z2024-08-12T12:07:35ZAuthor Krishnaswamy, Smita. author. Markov, Igor L. author. Hayes, John P. author. SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE(335669.1)<br/>Electronic Access <a href="http://dx.doi.org/10.1007/978-90-481-9644-9">http://dx.doi.org/10.1007/978-90-481-9644-9</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>VLSI-SoC: Advanced Research for Systems on Chip 19th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2011, Hong Kong, China, October 3-5, 2011, Revised Selected Papersent://SD_ILS/0/SD_ILS:1972722024-08-12T12:07:35Z2024-08-12T12:07:35ZAuthor Mir, Salvador. editor. Tsui, Chi-Ying. editor. Reis, Ricardo. editor. Choy, Oliver C. S. editor. SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="http://dx.doi.org/10.1007/978-3-642-32770-4">http://dx.doi.org/10.1007/978-3-642-32770-4</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>Computer Aided Verification 24th International Conference, CAV 2012, Berkeley, CA, USA, July 7-13, 2012 Proceedingsent://SD_ILS/0/SD_ILS:1970762024-08-12T12:07:35Z2024-08-12T12:07:35ZAuthor Madhusudan, P. editor. Seshia, Sanjit A. editor. SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="http://dx.doi.org/10.1007/978-3-642-31424-7">http://dx.doi.org/10.1007/978-3-642-31424-7</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>Power Electronics and Instrumentation Engineering International Conference, PEIE 2010, Kochi, Kerala, India, September 7-9, 2010. Proceedingsent://SD_ILS/0/SD_ILS:1930702024-08-12T12:07:35Z2024-08-12T12:07:35ZAuthor Das, Vinu V. editor. Stephen, Janahanlal. editor. Thankachan, Nessy. editor. SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="http://dx.doi.org/10.1007/978-3-642-15739-4">http://dx.doi.org/10.1007/978-3-642-15739-4</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>Advances in Power Electronics and Instrumentation Engineering Second International Conference, PEIE 2011, Nagpur, Maharashtra, India, April 21-22, 2011. Proceedingsent://SD_ILS/0/SD_ILS:1943932024-08-12T12:07:35Z2024-08-12T12:07:35ZAuthor Das, Vinu V. editor. Thankachan, Nessy. editor. Debnath, Narayan C. editor. SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="http://dx.doi.org/10.1007/978-3-642-20499-9">http://dx.doi.org/10.1007/978-3-642-20499-9</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation 19th International Workshop, PATMOS 2009, Delft, The Netherlands, September 9-11, 2009, Revised Selected Papersent://SD_ILS/0/SD_ILS:1918022024-08-12T12:07:35Z2024-08-12T12:07:35ZAuthor Monteiro, José. editor. Leuken, René. editor. SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="http://dx.doi.org/10.1007/978-3-642-11802-9">http://dx.doi.org/10.1007/978-3-642-11802-9</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>Correct Hardware Design and Verification Methods 13th IFIP WG 10.5 Advanced Research Working Conference, CHARME 2005, Saarbrücken, Germany, October 3-6, 2005. Proceedingsent://SD_ILS/0/SD_ILS:1830952024-08-12T12:07:35Z2024-08-12T12:07:35ZAuthor Borrione, Dominique. editor. Paul, Wolfgang. editor. SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="http://dx.doi.org/10.1007/11560548">http://dx.doi.org/10.1007/11560548</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>