Search Results for -- UYGARLIK, ORTAÇAĞ, EDEBİYATTA. - Narrowed by: Logic design. - Systems engineering.
SirsiDynix Enterprise
https://katalog.hacettepe.edu.tr/client/en_US/default/default/qu$003d--$002bUYGARLIK$00252C$002bORTA$0025C3$002587A$0025C4$00259E$00252C$002bEDEB$0025C4$0025B0YATTA.$0026qf$003dSUBJECT$002509Subject$002509Logic$002bdesign.$002509Logic$002bdesign.$0026qf$003dSUBJECT$002509Subject$002509Systems$002bengineering.$002509Systems$002bengineering.$0026ic$003dtrue$0026te$003dILS$0026ps$003d300?dt=list
2024-08-12T09:26:45Z
Simulation and Optimization of Digital Circuits Considering and Mitigating Destabilizing Factors
ent://SD_ILS/0/SD_ILS:399090
2024-08-12T09:26:45Z
2024-08-12T09:26:45Z
Author Melikyan, Vazgen. author. SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="https://doi.org/10.1007/978-3-319-71637-4">https://doi.org/10.1007/978-3-319-71637-4</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>
Principles and Structures of FPGAs
ent://SD_ILS/0/SD_ILS:399651
2024-08-12T09:26:45Z
2024-08-12T09:26:45Z
Author Amano, Hideharu. editor. SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="https://doi.org/10.1007/978-981-13-0824-6">https://doi.org/10.1007/978-981-13-0824-6</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>
Introduzione al Progetto di Sistemi Digitali
ent://SD_ILS/0/SD_ILS:401180
2024-08-12T09:26:45Z
2024-08-12T09:26:45Z
Author Donzellini, Giuliano. author. Oneto, Luca. author. Ponta, Domenico. author. Anguita, Davide. author. SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="https://doi.org/10.1007/978-88-470-3963-6">https://doi.org/10.1007/978-88-470-3963-6</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>
ASIC/SoC Functional Design Verification A Comprehensive Guide to Technologies and Methodologies
ent://SD_ILS/0/SD_ILS:401372
2024-08-12T09:26:45Z
2024-08-12T09:26:45Z
Author Mehta, Ashok B. author. SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="https://doi.org/10.1007/978-3-319-59418-7">https://doi.org/10.1007/978-3-319-59418-7</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>
Reliable and Energy Efficient Streaming Multiprocessor Systems
ent://SD_ILS/0/SD_ILS:401431
2024-08-12T09:26:45Z
2024-08-12T09:26:45Z
Author Das, Anup Kumar. author. Kumar, Akash. author. Veeravalli, Bharadwaj. author. Catthoor, Francky. author. SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="https://doi.org/10.1007/978-3-319-69374-3">https://doi.org/10.1007/978-3-319-69374-3</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>
Design of FPGA-Based Computing Systems with OpenCL
ent://SD_ILS/0/SD_ILS:401920
2024-08-12T09:26:45Z
2024-08-12T09:26:45Z
Author Waidyasooriya, Hasitha Muthumala. author. Hariyama, Masanori. author. Uchiyama, Kunio. author. SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="https://doi.org/10.1007/978-3-319-68161-0">https://doi.org/10.1007/978-3-319-68161-0</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>
Finite State Machine Logic Synthesis for Complex Programmable Logic Devices
ent://SD_ILS/0/SD_ILS:334139
2024-08-12T09:26:45Z
2024-08-12T09:26:45Z
Author Czerwinski, Robert. author. Kania, Dariusz. author. SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE(334139.1)<br/>Electronic Access <a href="http://dx.doi.org/10.1007/978-3-642-36166-1">http://dx.doi.org/10.1007/978-3-642-36166-1</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>
Design, Analysis and Test of Logic Circuits Under Uncertainty
ent://SD_ILS/0/SD_ILS:335669
2024-08-12T09:26:45Z
2024-08-12T09:26:45Z
Author Krishnaswamy, Smita. author. Markov, Igor L. author. Hayes, John P. author. SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE(335669.1)<br/>Electronic Access <a href="http://dx.doi.org/10.1007/978-90-481-9644-9">http://dx.doi.org/10.1007/978-90-481-9644-9</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>
Theory of Digital Automata
ent://SD_ILS/0/SD_ILS:335923
2024-08-12T09:26:45Z
2024-08-12T09:26:45Z
Author Borowik, Bohdan. author. Karpinskyy, Mykola. author. Lahno, Valery. author. Petrov, Oleksandr. author. SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE(335923.1)<br/>Electronic Access <a href="http://dx.doi.org/10.1007/978-94-007-5228-3">http://dx.doi.org/10.1007/978-94-007-5228-3</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>
Logic Circuit Design Selected Methods
ent://SD_ILS/0/SD_ILS:196263
2024-08-12T09:26:45Z
2024-08-12T09:26:45Z
Author Vingron, Shimon P. author. SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="http://dx.doi.org/10.1007/978-3-642-27657-6">http://dx.doi.org/10.1007/978-3-642-27657-6</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>
Adiabatic Logic Future Trend and System Level Perspective
ent://SD_ILS/0/SD_ILS:206336
2024-08-12T09:26:45Z
2024-08-12T09:26:45Z
Author Teichmann, Philip. author. SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="http://dx.doi.org/10.1007/978-94-007-2345-0">http://dx.doi.org/10.1007/978-94-007-2345-0</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>
The Unknown Component Problem Theory and Applications
ent://SD_ILS/0/SD_ILS:166624
2024-08-12T09:26:45Z
2024-08-12T09:26:45Z
Author Villa, Tiziano. author. Yevtushenko, Nina. author. Brayton, Robert K. author. Mishchenko, Alan. author. Petrenko, Alexandre. author.<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="http://dx.doi.org/10.1007/978-0-387-68759-9">http://dx.doi.org/10.1007/978-0-387-68759-9</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>
Compact Models and Measurement Techniques for High-Speed Interconnects
ent://SD_ILS/0/SD_ILS:173845
2024-08-12T09:26:45Z
2024-08-12T09:26:45Z
Author Sharma, Rohit. author. Chakravarty, Tapas. author. SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="http://dx.doi.org/10.1007/978-1-4614-1071-3">http://dx.doi.org/10.1007/978-1-4614-1071-3</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>
Entwurf integrierter 3D-Systeme der Elektronik
ent://SD_ILS/0/SD_ILS:196921
2024-08-12T09:26:45Z
2024-08-12T09:26:45Z
Author Lienig, Jens. editor. Dietrich, Manfred. editor. SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="http://dx.doi.org/10.1007/978-3-642-30572-6">http://dx.doi.org/10.1007/978-3-642-30572-6</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>
Technische Informatik Band 2: Entwurf digitaler Schaltungen
ent://SD_ILS/0/SD_ILS:193603
2024-08-12T09:26:45Z
2024-08-12T09:26:45Z
Author Kemnitz, Günter. author. SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="http://dx.doi.org/10.1007/978-3-642-17447-6">http://dx.doi.org/10.1007/978-3-642-17447-6</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>
VLSI Physical Design: From Graph Partitioning to Timing Closure
ent://SD_ILS/0/SD_ILS:205534
2024-08-12T09:26:45Z
2024-08-12T09:26:45Z
Author Kahng, Andrew B. author. Lienig, Jens. author. Markov, Igor L. author. Hu, Jin. author. SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="http://dx.doi.org/10.1007/978-90-481-9591-6">http://dx.doi.org/10.1007/978-90-481-9591-6</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>
Regular Nanofabrics in Emerging Technologies Design and Fabrication Methods for Nanoscale Digital Circuits
ent://SD_ILS/0/SD_ILS:205904
2024-08-12T09:26:45Z
2024-08-12T09:26:45Z
Author Ben Jamaa, M. Haykel. author. SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="http://dx.doi.org/10.1007/978-94-007-0650-7">http://dx.doi.org/10.1007/978-94-007-0650-7</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>
Speech Processing in Embedded Systems
ent://SD_ILS/0/SD_ILS:167277
2024-08-12T09:26:45Z
2024-08-12T09:26:45Z
Author Sinha, Priyabrata. author. SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="http://dx.doi.org/10.1007/978-0-387-75581-6">http://dx.doi.org/10.1007/978-0-387-75581-6</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>
Electronics System Design Techniques for Safety Critical Applications
ent://SD_ILS/0/SD_ILS:170397
2024-08-12T09:26:45Z
2024-08-12T09:26:45Z
Author Sterpone, Luca. author. SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="http://dx.doi.org/10.1007/978-1-4020-8979-4">http://dx.doi.org/10.1007/978-1-4020-8979-4</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>
Functional Design Errors in Digital Circuits Diagnosis, Correction and Repair
ent://SD_ILS/0/SD_ILS:170513
2024-08-12T09:26:45Z
2024-08-12T09:26:45Z
Author Chang, Kai-hui. author. Markov, Igor L. author. Bertacco, Valeria. author. SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="http://dx.doi.org/10.1007/978-1-4020-9365-4">http://dx.doi.org/10.1007/978-1-4020-9365-4</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>
Logic Functions and Equations Examples and Exercises
ent://SD_ILS/0/SD_ILS:170583
2024-08-12T09:26:45Z
2024-08-12T09:26:45Z
Author Steinbach, Bernd. author. Posthoff, Christian. author. SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="http://dx.doi.org/10.1007/978-1-4020-9595-5">http://dx.doi.org/10.1007/978-1-4020-9595-5</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>
More than Moore Creating High Value Micro/Nanoelectronics Systems
ent://SD_ILS/0/SD_ILS:167281
2024-08-12T09:26:45Z
2024-08-12T09:26:45Z
Author Zhang, Guo Qi. editor. Roosmalen, Alfred. editor. SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="http://dx.doi.org/10.1007/978-0-387-75593-9">http://dx.doi.org/10.1007/978-0-387-75593-9</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>
Introduction to Embedded System Design Using Field Programmable Gate Arrays
ent://SD_ILS/0/SD_ILS:175875
2024-08-12T09:26:45Z
2024-08-12T09:26:45Z
Author Dubey, Rahul. author. SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="http://dx.doi.org/10.1007/978-1-84882-016-6">http://dx.doi.org/10.1007/978-1-84882-016-6</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>
Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation 18th International Workshop, PATMOS 2008, Lisbon, Portugal, September 10-12, 2008. Revised Selected Papers
ent://SD_ILS/0/SD_ILS:189565
2024-08-12T09:26:45Z
2024-08-12T09:26:45Z
Author Svensson, Lars. editor. Monteiro, José. editor. SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="http://dx.doi.org/10.1007/978-3-540-95948-9">http://dx.doi.org/10.1007/978-3-540-95948-9</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>
Logic Synthesis for FSM-Based Control Units
ent://SD_ILS/0/SD_ILS:190905
2024-08-12T09:26:45Z
2024-08-12T09:26:45Z
Author Barkalov, Alexander. author. Titarenko, Larysa. author. SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="http://dx.doi.org/10.1007/978-3-642-04309-3">http://dx.doi.org/10.1007/978-3-642-04309-3</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>
Logic Synthesis for Compositional Microprogram Control Units
ent://SD_ILS/0/SD_ILS:185766
2024-08-12T09:26:45Z
2024-08-12T09:26:45Z
Author Barkalov, Alexander. editor. Titarenko, Larysa. editor. SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="http://dx.doi.org/10.1007/978-3-540-69285-0">http://dx.doi.org/10.1007/978-3-540-69285-0</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>
Practical Problems in VLSI Physical Design Automation
ent://SD_ILS/0/SD_ILS:169876
2024-08-12T09:26:45Z
2024-08-12T09:26:45Z
Author Lim, Sung Kyu. author. SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="http://dx.doi.org/10.1007/978-1-4020-6627-6">http://dx.doi.org/10.1007/978-1-4020-6627-6</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>
High-Level Synthesis From Algorithm to Digital Circuit
ent://SD_ILS/0/SD_ILS:170235
2024-08-12T09:26:45Z
2024-08-12T09:26:45Z
Author Coussy, Philippe. editor. Morawiec, Adam. editor. SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="http://dx.doi.org/10.1007/978-1-4020-8588-8">http://dx.doi.org/10.1007/978-1-4020-8588-8</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>
Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation 17th International Workshop, PATMOS 2007, Gothenburg, Sweden, September 3-5, 2007. Proceedings
ent://SD_ILS/0/SD_ILS:187155
2024-08-12T09:26:45Z
2024-08-12T09:26:45Z
Author Azémard, Nadine. editor. Svensson, Lars. editor. SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="http://dx.doi.org/10.1007/978-3-540-74442-9">http://dx.doi.org/10.1007/978-3-540-74442-9</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>
Layoutsynthese elektronischer Schaltungen — Grundlegende Algorithmen für die Entwurfsautomatisierung
ent://SD_ILS/0/SD_ILS:182190
2024-08-12T09:26:45Z
2024-08-12T09:26:45Z
Author Lienig, Jens. author. SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="http://dx.doi.org/10.1007/3-540-29942-4">http://dx.doi.org/10.1007/3-540-29942-4</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>
Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation 16th International Workshop, PATMOS 2006, Montpellier, France, September 13-15, 2006. Proceedings
ent://SD_ILS/0/SD_ILS:184718
2024-08-12T09:26:45Z
2024-08-12T09:26:45Z
Author Vounckx, Johan. editor. Azemard, Nadine. editor. Maurine, Philippe. editor. SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="http://dx.doi.org/10.1007/11847083">http://dx.doi.org/10.1007/11847083</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>
A Roadmap for Formal Property Verification
ent://SD_ILS/0/SD_ILS:169271
2024-08-12T09:26:45Z
2024-08-12T09:26:45Z
Author DasGupta, Pallab. author. SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="http://dx.doi.org/10.1007/978-1-4020-4758-9">http://dx.doi.org/10.1007/978-1-4020-4758-9</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>
Taxonomies for the Development and Verification of Digital Systems
ent://SD_ILS/0/SD_ILS:165002
2024-08-12T09:26:45Z
2024-08-12T09:26:45Z
Author Bailey, Brian. editor. Martin, Grant. editor. Anderson, Thomas. editor. SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="http://dx.doi.org/10.1007/b104217">http://dx.doi.org/10.1007/b104217</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>