Search Results for Computer science. - Narrowed by: Ayala, José L. editor. - English - Computer Communication Networks. - Logic design.SirsiDynix Enterprisehttps://katalog.hacettepe.edu.tr/client/en_US/default/default/qu$003dComputer$002bscience.$0026qf$003dAUTHOR$002509Author$002509Ayala$00252C$002bJos$0025C3$0025A9$002bL.$002beditor.$002509Ayala$00252C$002bJos$0025C3$0025A9$002bL.$002beditor.$0026qf$003dLANGUAGE$002509Language$002509ENG$002509English$0026qf$003dSUBJECT$002509Subject$002509Computer$002bCommunication$002bNetworks.$002509Computer$002bCommunication$002bNetworks.$0026qf$003dSUBJECT$002509Subject$002509Logic$002bdesign.$002509Logic$002bdesign.$0026te$003dILS$0026ps$003d300?2024-09-06T07:50:05ZIntegrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation 22nd International Workshop, PATMOS 2012, Newcastle upon Tyne, UK, September 4-6, 2012, Revised Selected Papersent://SD_ILS/0/SD_ILS:3341362024-09-06T07:50:05Z2024-09-06T07:50:05ZAuthor Ayala, José L. editor. Shang, Delong. editor. Yakovlev, Alex. editor. SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE(334136.1)<br/>Electronic Access <a href="http://dx.doi.org/10.1007/978-3-642-36157-9">http://dx.doi.org/10.1007/978-3-642-36157-9</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>Integrated Circuit and System Design. Power and Timing Modeling, Optimization, and Simulation 21st International Workshop, PATMOS 2011, Madrid, Spain, September 26-29, 2011. Proceedingsent://SD_ILS/0/SD_ILS:1955622024-09-06T07:50:05Z2024-09-06T07:50:05ZAuthor Ayala, José L. editor. García-Cámara, Braulio. editor. Prieto, Manuel. editor. Ruggiero, Martino. editor. Sicard, Gilles. editor.<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="http://dx.doi.org/10.1007/978-3-642-24154-3">http://dx.doi.org/10.1007/978-3-642-24154-3</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>