Search Results for Design. - Narrowed by: Computer hardware.SirsiDynix Enterprisehttps://katalog.hacettepe.edu.tr/client/en_US/default/default/qu$003dDesign.$0026qf$003dSUBJECT$002509Subject$002509Computer$002bhardware.$002509Computer$002bhardware.$0026ic$003dtrue$0026ps$003d300?2025-12-24T12:51:44ZCyber Physical Systems. Design, Modeling, and Evaluation 7th International Workshop, CyPhy 2017, Seoul, South Korea, October 15-20, 2017, Revised Selected Papersent://SD_ILS/0/SD_ILS:4834712025-12-24T12:51:44Z2025-12-24T12:51:44ZAuthor Chamberlain, Roger. editor. Taha, Walid. editor. (orcid)0000-0003-3160-9188 Törngren, Martin. editor. (orcid)0000-0002-4300-885X SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="https://doi.org/10.1007/978-3-030-17910-6">https://doi.org/10.1007/978-3-030-17910-6</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>VLSI Design and Test 23rd International Symposium, VDAT 2019, Indore, India, July 4–6, 2019, Revised Selected Papersent://SD_ILS/0/SD_ILS:4866872025-12-24T12:51:44Z2025-12-24T12:51:44ZAuthor Sengupta, Anirban. editor. Dasgupta, Sudeb. editor. Singh, Virendra. editor. Sharma, Rohit. editor. Kumar Vishvakarma, Santosh. editor.<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="https://doi.org/10.1007/978-981-32-9767-8">https://doi.org/10.1007/978-981-32-9767-8</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>VLSI Design and Test 22nd International Symposium, VDAT 2018, Madurai, India, June 28-30, 2018, Revised Selected Papersent://SD_ILS/0/SD_ILS:4835822025-12-24T12:51:44Z2025-12-24T12:51:44ZAuthor Rajaram, S. editor. Balamurugan, N.B. editor. Gracia Nirmala Rani, D. editor. Singh, Virendra. editor. SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="https://doi.org/10.1007/978-981-13-5950-7">https://doi.org/10.1007/978-981-13-5950-7</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>Design Concepts for a Virtualizable Embedded MPSoC Architecture Enabling Virtualization in Embedded Multi-Processor Systemsent://SD_ILS/0/SD_ILS:4893272025-12-24T12:51:44Z2025-12-24T12:51:44ZAuthor Biedermann, Alexander. author. SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="https://doi.org/10.1007/978-3-658-08047-1">https://doi.org/10.1007/978-3-658-08047-1</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>VLSI-SoC: From Algorithms to Circuits and System-on-Chip Design 20th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2012, Santa Cruz, CA, USA, October 7-10, 2012, Revised Selected Papersent://SD_ILS/0/SD_ILS:3351882025-12-24T12:51:44Z2025-12-24T12:51:44ZAuthor Burg, Andreas. editor. Coṣkun, Ayṣe. editor. Guthaus, Matthew. editor. Katkoori, Srinivas. editor. Reis, Ricardo. editor.<br/>Preferred Shelf Number ONLINE(335188.1)<br/>Electronic Access <a href="http://dx.doi.org/10.1007/978-3-642-45073-0">http://dx.doi.org/10.1007/978-3-642-45073-0</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>Design, Analysis and Test of Logic Circuits Under Uncertaintyent://SD_ILS/0/SD_ILS:3356692025-12-24T12:51:44Z2025-12-24T12:51:44ZAuthor Krishnaswamy, Smita. author. Markov, Igor L. author. Hayes, John P. author. SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE(335669.1)<br/>Electronic Access <a href="http://dx.doi.org/10.1007/978-90-481-9644-9">http://dx.doi.org/10.1007/978-90-481-9644-9</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>Multicore Systems On-Chip: Practical Software/Hardware Design 2nd Editionent://SD_ILS/0/SD_ILS:3364952025-12-24T12:51:44Z2025-12-24T12:51:44ZAuthor Ben Abdallah, Abderazek. author. SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE(336495.1)<br/>Electronic Access <a href="http://dx.doi.org/10.2991/978-94-91216-92-3">http://dx.doi.org/10.2991/978-94-91216-92-3</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>VLSI Design and Test 17th International Symposium, VDAT 2013, Jaipur, India, July 27-30, 2013, Revised Selected Papersent://SD_ILS/0/SD_ILS:3351562025-12-24T12:51:44Z2025-12-24T12:51:44ZAuthor Gaur, Manoj Singh. editor. Zwolinski, Mark. editor. Laxmi, Vijay. editor. Boolchandani, Dharmendra. editor. Sing, Virendra. editor.<br/>Preferred Shelf Number ONLINE(335156.1)<br/>Electronic Access <a href="http://dx.doi.org/10.1007/978-3-642-42024-5">http://dx.doi.org/10.1007/978-3-642-42024-5</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation 19th International Workshop, PATMOS 2009, Delft, The Netherlands, September 9-11, 2009, Revised Selected Papersent://SD_ILS/0/SD_ILS:1918022025-12-24T12:51:44Z2025-12-24T12:51:44ZAuthor Monteiro, José. editor. Leuken, René. editor. SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="http://dx.doi.org/10.1007/978-3-642-11802-9">http://dx.doi.org/10.1007/978-3-642-11802-9</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>Hardware Software Co-Design of a Multimedia SOC Platforment://SD_ILS/0/SD_ILS:1705932025-12-24T12:51:44Z2025-12-24T12:51:44ZAuthor Chen, Sao-Jie. author. Lin, Guang-Huei. author. Hsiung, Pao-Ann. author. Hu, Yu-Hen. author. SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="http://dx.doi.org/10.1007/978-1-4020-9623-5">http://dx.doi.org/10.1007/978-1-4020-9623-5</a><br/>Format: Electronic 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Automation, and Test in Europe The Most Influential Papers of 10 Years Dateent://SD_ILS/0/SD_ILS:1698262025-12-24T12:51:44Z2025-12-24T12:51:44ZAuthor Lauwereins, Rudy. editor. Madsen, Jan. editor. SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="http://dx.doi.org/10.1007/978-1-4020-6488-3">http://dx.doi.org/10.1007/978-1-4020-6488-3</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>Co-design for System Acceleration A Quantitative Approachent://SD_ILS/0/SD_ILS:1695172025-12-24T12:51:44Z2025-12-24T12:51:44ZAuthor Nedjah, Nadia. author. Mourelle, Luiza De Macedo. author. SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="http://dx.doi.org/10.1007/978-1-4020-5546-1">http://dx.doi.org/10.1007/978-1-4020-5546-1</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>Digital VLSI Systems Design A Design Manual for Implementation of Projects on FPGAs and ASICs Using Verilogent://SD_ILS/0/SD_ILS:1696092025-12-24T12:51:44Z2025-12-24T12:51:44ZAuthor Ramachandran, S. author. SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="http://dx.doi.org/10.1007/978-1-4020-5829-5">http://dx.doi.org/10.1007/978-1-4020-5829-5</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>Closing the Power Gap Between ASIC & Custom Tools and Techniques for Low Power Designent://SD_ILS/0/SD_ILS:1666652025-12-24T12:51:44Z2025-12-24T12:51:44ZAuthor Chinnery, David. author. Keutzer, Kurt. author. SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="http://dx.doi.org/10.1007/978-0-387-68953-1">http://dx.doi.org/10.1007/978-0-387-68953-1</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>Low Power Methodology Manual For System-on-Chip Designent://SD_ILS/0/SD_ILS:1668882025-12-24T12:51:44Z2025-12-24T12:51:44ZAuthor Keating, Michael. author. Flynn, David. author. Aitken, Robert. author. Gibbons, Alan. author. Shi, Kaijian. author.<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="http://dx.doi.org/10.1007/978-0-387-71819-4">http://dx.doi.org/10.1007/978-0-387-71819-4</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>SystemVerilog for Design A Guide to Using SystemVerilog for Hardware Design and Modelingent://SD_ILS/0/SD_ILS:1661522025-12-24T12:51:44Z2025-12-24T12:51:44ZAuthor Sutherland, Stuart. author. Davidmann, Simon. author. Flake, Peter. author. SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="http://dx.doi.org/10.1007/0-387-36495-1">http://dx.doi.org/10.1007/0-387-36495-1</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>Knowledge Enterprise: Intelligent Strategies in Product Design, Manufacturing, and Management Proceedings of PROLAMAT 2006, IFIP TC5 International Conference, June 15–17, 2006, Shanghai, Chinaent://SD_ILS/0/SD_ILS:1660252025-12-24T12:51:44Z2025-12-24T12:51:44ZAuthor Wang, Kesheng. editor. Kovacs, George L. editor. Wozny, Michael. editor. Fang, Minglun. editor. SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="http://dx.doi.org/10.1007/0-387-34403-9">http://dx.doi.org/10.1007/0-387-34403-9</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>Applications of Specification and Design Languages for SoCs Selected papers from FDL 2005ent://SD_ILS/0/SD_ILS:1693402025-12-24T12:51:44Z2025-12-24T12:51:44ZAuthor Vachoux, A. editor. SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="http://dx.doi.org/10.1007/978-1-4020-4998-9">http://dx.doi.org/10.1007/978-1-4020-4998-9</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>Platform Based Design at the Electronic System Level Industry Perspectives and Experiencesent://SD_ILS/0/SD_ILS:1693852025-12-24T12:51:44Z2025-12-24T12:51:44ZAuthor Burton, Mark. author. Morawiec, Adam. author. SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="http://dx.doi.org/10.1007/1-4020-5138-7">http://dx.doi.org/10.1007/1-4020-5138-7</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>System-Level Design Techniques for Energy-Efficient Embedded Systemsent://SD_ILS/0/SD_ILS:1646252025-12-24T12:51:44Z2025-12-24T12:51:44ZAuthor Schmitz, Marcus T. author. Al-Hashimi, Bashir M. author. Eles, Petru. author. SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="http://dx.doi.org/10.1007/b106642">http://dx.doi.org/10.1007/b106642</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>Correct Hardware Design and Verification Methods 13th IFIP WG 10.5 Advanced Research Working Conference, CHARME 2005, Saarbrücken, Germany, October 3-6, 2005. Proceedingsent://SD_ILS/0/SD_ILS:1830952025-12-24T12:51:44Z2025-12-24T12:51:44ZAuthor Borrione, Dominique. editor. Paul, Wolfgang. editor. SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="http://dx.doi.org/10.1007/11560548">http://dx.doi.org/10.1007/11560548</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>Tools and Algorithms for the Construction and Analysis of Systems 24th International Conference, TACAS 2018, Held as Part of the European Joint Conferences on Theory and Practice of Software, ETAPS 2018, Thessaloniki, Greece, April 14-20, 2018, Proceedings, Part IIent://SD_ILS/0/SD_ILS:4006412025-12-24T12:51:44Z2025-12-24T12:51:44ZAuthor Beyer, Dirk. editor. (orcid)0000-0003-4832-7662 Huisman, Marieke. editor. SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="https://doi.org/10.1007/978-3-319-89963-3">https://doi.org/10.1007/978-3-319-89963-3</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>Software Engineering and Formal Methods SEFM 2017 Collocated Workshops: DataMod, FAACS, MSE, CoSim-CPS, and FOCLASA, Trento, Italy, September 4-5, 2017, Revised Selected Papersent://SD_ILS/0/SD_ILS:4025222025-12-24T12:51:44Z2025-12-24T12:51:44ZAuthor Cerone, Antonio. editor. (orcid)0000-0003-2691-5279 Roveri, Marco. editor. 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Proceedingsent://SD_ILS/0/SD_ILS:1930702025-12-24T12:51:44Z2025-12-24T12:51:44ZAuthor Das, Vinu V. editor. Stephen, Janahanlal. editor. Thankachan, Nessy. editor. SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="http://dx.doi.org/10.1007/978-3-642-15739-4">http://dx.doi.org/10.1007/978-3-642-15739-4</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>Quantifying and Exploring the Gap Between FPGAs and ASICs Measuring and Exploringent://SD_ILS/0/SD_ILS:1720522025-12-24T12:51:44Z2025-12-24T12:51:44ZAuthor Kuon, Ian. author. Rose, Jonathan. author. SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="http://dx.doi.org/10.1007/978-1-4419-0739-4">http://dx.doi.org/10.1007/978-1-4419-0739-4</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>Low-Power High-Level Synthesis for Nanoscale CMOS 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Featuresent://SD_ILS/0/SD_ILS:1673582025-12-24T12:51:44Z2025-12-24T12:51:44ZAuthor Spear, Chris. author. SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="http://dx.doi.org/10.1007/978-0-387-76530-3">http://dx.doi.org/10.1007/978-0-387-76530-3</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>Verilog and SystemVerilog Gotchas 101 Common Coding Errors and How to Avoid Thement://SD_ILS/0/SD_ILS:1668622025-12-24T12:51:44Z2025-12-24T12:51:44ZAuthor Sutherland, Stuart. author. Mills, Don. author. SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="http://dx.doi.org/10.1007/978-0-387-71715-9">http://dx.doi.org/10.1007/978-0-387-71715-9</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>Hardware Verification with SystemVerilog An Object-Oriented Frameworkent://SD_ILS/0/SD_ILS:1668692025-12-24T12:51:44Z2025-12-24T12:51:44ZAuthor Mintz, Mike. author. Ekendahl, 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