Search Results for Design. - Narrowed by: Computer hardware.SirsiDynix Enterprisehttps://katalog.hacettepe.edu.tr/client/en_US/default/default/qu$003dDesign.$0026qf$003dSUBJECT$002509Subject$002509Computer$002bhardware.$002509Computer$002bhardware.$0026te$003dILS$0026ps$003d300?2025-12-26T02:46:41ZCyber Physical Systems. Design, Modeling, and Evaluation 7th International Workshop, CyPhy 2017, Seoul, South Korea, October 15-20, 2017, Revised Selected Papersent://SD_ILS/0/SD_ILS:4834712025-12-26T02:46:41Z2025-12-26T02:46:41ZAuthor Chamberlain, Roger. editor. Taha, Walid. editor. (orcid)0000-0003-3160-9188 Törngren, Martin. editor. (orcid)0000-0002-4300-885X SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="https://doi.org/10.1007/978-3-030-17910-6">https://doi.org/10.1007/978-3-030-17910-6</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>VLSI Design and Test 22nd International Symposium, VDAT 2018, Madurai, India, June 28-30, 2018, Revised Selected Papersent://SD_ILS/0/SD_ILS:4835822025-12-26T02:46:41Z2025-12-26T02:46:41ZAuthor Rajaram, S. editor. Balamurugan, N.B. editor. Gracia Nirmala Rani, D. editor. Singh, Virendra. editor. SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="https://doi.org/10.1007/978-981-13-5950-7">https://doi.org/10.1007/978-981-13-5950-7</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>VLSI Design and Test 23rd International Symposium, VDAT 2019, Indore, India, July 4–6, 2019, Revised Selected Papersent://SD_ILS/0/SD_ILS:4866872025-12-26T02:46:41Z2025-12-26T02:46:41ZAuthor Sengupta, Anirban. editor. Dasgupta, Sudeb. editor. Singh, Virendra. editor. Sharma, Rohit. editor. Kumar Vishvakarma, Santosh. editor.<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="https://doi.org/10.1007/978-981-32-9767-8">https://doi.org/10.1007/978-981-32-9767-8</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>Design Concepts for a Virtualizable Embedded MPSoC Architecture Enabling Virtualization in Embedded Multi-Processor Systemsent://SD_ILS/0/SD_ILS:4893272025-12-26T02:46:41Z2025-12-26T02:46:41ZAuthor Biedermann, Alexander. author. SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="https://doi.org/10.1007/978-3-658-08047-1">https://doi.org/10.1007/978-3-658-08047-1</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>VLSI Design and Test 17th International Symposium, VDAT 2013, Jaipur, India, July 27-30, 2013, Revised Selected Papersent://SD_ILS/0/SD_ILS:3351562025-12-26T02:46:41Z2025-12-26T02:46:41ZAuthor Gaur, Manoj Singh. editor. Zwolinski, Mark. editor. Laxmi, Vijay. editor. Boolchandani, Dharmendra. editor. Sing, Virendra. editor.<br/>Preferred Shelf Number ONLINE(335156.1)<br/>Electronic Access <a href="http://dx.doi.org/10.1007/978-3-642-42024-5">http://dx.doi.org/10.1007/978-3-642-42024-5</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>VLSI-SoC: From Algorithms to Circuits and System-on-Chip Design 20th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2012, Santa Cruz, CA, USA, October 7-10, 2012, Revised Selected Papersent://SD_ILS/0/SD_ILS:3351882025-12-26T02:46:41Z2025-12-26T02:46:41ZAuthor Burg, Andreas. editor. Coṣkun, Ayṣe. editor. Guthaus, Matthew. editor. Katkoori, Srinivas. editor. Reis, Ricardo. editor.<br/>Preferred Shelf Number ONLINE(335188.1)<br/>Electronic Access <a href="http://dx.doi.org/10.1007/978-3-642-45073-0">http://dx.doi.org/10.1007/978-3-642-45073-0</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>Design, Analysis and Test of Logic Circuits Under Uncertaintyent://SD_ILS/0/SD_ILS:3356692025-12-26T02:46:41Z2025-12-26T02:46:41ZAuthor Krishnaswamy, Smita. author. Markov, Igor L. author. Hayes, John P. author. SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE(335669.1)<br/>Electronic Access <a href="http://dx.doi.org/10.1007/978-90-481-9644-9">http://dx.doi.org/10.1007/978-90-481-9644-9</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>Multicore Systems On-Chip: Practical Software/Hardware Design 2nd Editionent://SD_ILS/0/SD_ILS:3364952025-12-26T02:46:41Z2025-12-26T02:46:41ZAuthor Ben Abdallah, Abderazek. author. SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE(336495.1)<br/>Electronic Access <a href="http://dx.doi.org/10.2991/978-94-91216-92-3">http://dx.doi.org/10.2991/978-94-91216-92-3</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation 19th International Workshop, PATMOS 2009, Delft, The Netherlands, September 9-11, 2009, Revised Selected Papersent://SD_ILS/0/SD_ILS:1918022025-12-26T02:46:41Z2025-12-26T02:46:41ZAuthor Monteiro, José. editor. Leuken, René. editor. SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="http://dx.doi.org/10.1007/978-3-642-11802-9">http://dx.doi.org/10.1007/978-3-642-11802-9</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>Hardware Software Co-Design of a Multimedia SOC Platforment://SD_ILS/0/SD_ILS:1705932025-12-26T02:46:41Z2025-12-26T02:46:41ZAuthor Chen, Sao-Jie. author. Lin, Guang-Huei. author. Hsiung, Pao-Ann. author. Hu, Yu-Hen. author. SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="http://dx.doi.org/10.1007/978-1-4020-9623-5">http://dx.doi.org/10.1007/978-1-4020-9623-5</a><br/>Format: Electronic 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using Microcontrollersent://SD_ILS/0/SD_ILS:1701492025-12-26T02:46:41Z2025-12-26T02:46:41ZAuthor Parab, Jivan S. author. Shinde, Santosh A. author. Shelake, Vinod G. author. Kamat, Rajanish K. author. Naik, Gourish M. author.<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="http://dx.doi.org/10.1007/978-1-4020-8393-8">http://dx.doi.org/10.1007/978-1-4020-8393-8</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>Low Power Methodology Manual For System-on-Chip Designent://SD_ILS/0/SD_ILS:1668882025-12-26T02:46:41Z2025-12-26T02:46:41ZAuthor Keating, Michael. author. Flynn, David. author. Aitken, Robert. author. Gibbons, Alan. author. Shi, Kaijian. author.<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="http://dx.doi.org/10.1007/978-0-387-71819-4">http://dx.doi.org/10.1007/978-0-387-71819-4</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>Co-design for System Acceleration A Quantitative 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Experiencesent://SD_ILS/0/SD_ILS:1693852025-12-26T02:46:41Z2025-12-26T02:46:41ZAuthor Burton, Mark. author. Morawiec, Adam. author. SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="http://dx.doi.org/10.1007/1-4020-5138-7">http://dx.doi.org/10.1007/1-4020-5138-7</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>Correct Hardware Design and Verification Methods 13th IFIP WG 10.5 Advanced Research Working Conference, CHARME 2005, Saarbrücken, Germany, October 3-6, 2005. Proceedingsent://SD_ILS/0/SD_ILS:1830952025-12-26T02:46:41Z2025-12-26T02:46:41ZAuthor Borrione, Dominique. editor. Paul, Wolfgang. editor. SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="http://dx.doi.org/10.1007/11560548">http://dx.doi.org/10.1007/11560548</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>System-Level Design Techniques for Energy-Efficient Embedded Systemsent://SD_ILS/0/SD_ILS:1646252025-12-26T02:46:41Z2025-12-26T02:46:41ZAuthor Schmitz, Marcus T. author. Al-Hashimi, Bashir M. author. Eles, Petru. author. SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="http://dx.doi.org/10.1007/b106642">http://dx.doi.org/10.1007/b106642</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>Computer Safety, Reliability, and Security SAFECOMP 2018 Workshops, ASSURE, DECSoS, SASSUR, STRIVE, and WAISE, Västerås, Sweden, September 18, 2018, Proceedingsent://SD_ILS/0/SD_ILS:3997832025-12-26T02:46:41Z2025-12-26T02:46:41ZAuthor Gallina, Barbara. editor. (orcid)0000-0002-6952-1053 Skavhaug, Amund. editor. Schoitsch, Erwin. editor. (orcid)0000-0002-0335-5443 Bitsch, Friedemann. editor. (orcid)0000-0001-6152-4121 SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="https://doi.org/10.1007/978-3-319-99229-7">https://doi.org/10.1007/978-3-319-99229-7</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>Reliable Software Technologies – Ada-Europe 2018 23rd Ada-Europe International Conference on Reliable Software Technologies, Lisbon, Portugal, June 18-22, 2018, Proceedingsent://SD_ILS/0/SD_ILS:4001462025-12-26T02:46:41Z2025-12-26T02:46:41ZAuthor Casimiro, António. editor. (orcid)0000-0002-5522-5739 Ferreira, Pedro M. editor. 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Proceedingsent://SD_ILS/0/SD_ILS:1930702025-12-26T02:46:41Z2025-12-26T02:46:41ZAuthor Das, Vinu V. editor. Stephen, Janahanlal. editor. Thankachan, Nessy. editor. SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="http://dx.doi.org/10.1007/978-3-642-15739-4">http://dx.doi.org/10.1007/978-3-642-15739-4</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>Post-Silicon and Runtime Verification for Modern Processorsent://SD_ILS/0/SD_ILS:1730492025-12-26T02:46:41Z2025-12-26T02:46:41ZAuthor Wagner, Ilya. author. Bertacco, Valeria. author. SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="http://dx.doi.org/10.1007/978-1-4419-8034-2">http://dx.doi.org/10.1007/978-1-4419-8034-2</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>Quantifying and Exploring the Gap Between FPGAs and ASICs Measuring and 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Applicationsent://SD_ILS/0/SD_ILS:1673432025-12-26T02:46:41Z2025-12-26T02:46:41ZAuthor Yuan, Fei. author. SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="http://dx.doi.org/10.1007/978-0-387-76479-5">http://dx.doi.org/10.1007/978-0-387-76479-5</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>System Verilog for Verification A Guide to Learning the Testbench Language Featuresent://SD_ILS/0/SD_ILS:1673582025-12-26T02:46:41Z2025-12-26T02:46:41ZAuthor Spear, Chris. author. SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="http://dx.doi.org/10.1007/978-0-387-76530-3">http://dx.doi.org/10.1007/978-0-387-76530-3</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>IT-Projektrecht Vertragliche Gestaltung und Steuerung von IT-Projekten, Best Practices, Haftung der Geschäftsleitungent://SD_ILS/0/SD_ILS:1867812025-12-26T02:46:41Z2025-12-26T02:46:41ZAuthor Koch, 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Resources<br/>Availability Online Library~1<br/>Leakage in Nanometer CMOS Technologiesent://SD_ILS/0/SD_ILS:1654742025-12-26T02:46:41Z2025-12-26T02:46:41ZAuthor Narendra, Siva G. author. Chandrakasan, Anantha. author. SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="http://dx.doi.org/10.1007/0-387-28133-9">http://dx.doi.org/10.1007/0-387-28133-9</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>Fully-Depleted SOI CMOS Circuits and Technology for Ultralow-Power Applicationsent://SD_ILS/0/SD_ILS:1656172025-12-26T02:46:41Z2025-12-26T02:46:41ZAuthor Sakurai, Takayasu. author. Matsuzawa, Akira. author. Douseki, Takakuni. author. SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="http://dx.doi.org/10.1007/978-0-387-29218-2">http://dx.doi.org/10.1007/978-0-387-29218-2</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>Interconnect Noise Optimization in Nanometer Technologiesent://SD_ILS/0/SD_ILS:1656372025-12-26T02:46:41Z2025-12-26T02:46:41ZAuthor Elgamel, Mohamed A. author. Bayoumi, Magdy A. author. SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="http://dx.doi.org/10.1007/0-387-29366-3">http://dx.doi.org/10.1007/0-387-29366-3</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>Scalable Hardware Verification with Symbolic Simulationent://SD_ILS/0/SD_ILS:1656832025-12-26T02:46:41Z2025-12-26T02:46:41ZAuthor Bertacco, Valeria. author. SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="http://dx.doi.org/10.1007/0-387-29906-8">http://dx.doi.org/10.1007/0-387-29906-8</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>System-level Test and Validation of Hardware/Software Systemsent://SD_ILS/0/SD_ILS:1752722025-12-26T02:46:41Z2025-12-26T02:46:41ZAuthor Sonza Reorda, Matteo. editor. Peng, Zebo. editor. Violante, Massimo. editor. SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="http://dx.doi.org/10.1007/1-84628-145-8">http://dx.doi.org/10.1007/1-84628-145-8</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>SystemC Kernel Extensions for Heterogeneous System Modeling A framework for Multi-MoC Modeling & Simulationent://SD_ILS/0/SD_ILS:1700482025-12-26T02:46:41Z2025-12-26T02:46:41ZAuthor Patel, Hiren D. author. Shukla, Sandeep K. author. SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="http://dx.doi.org/10.1007/b117249">http://dx.doi.org/10.1007/b117249</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>