Search Results for Drechsler, Rolf. - Narrowed by: Systems engineering. SirsiDynix Enterprise https://katalog.hacettepe.edu.tr/client/en_US/default/default/qu$003dDrechsler$00252C$002bRolf.$0026qf$003dSUBJECT$002509Subject$002509Systems$002bengineering.$002509Systems$002bengineering.$0026te$003dILS$0026ps$003d300? 2024-09-27T04:20:14Z Formal System Verification State-of the-Art and Future Trends ent://SD_ILS/0/SD_ILS:402258 2024-09-27T04:20:14Z 2024-09-27T04:20:14Z Author&#160;Drechsler, Rolf. editor.&#160;SpringerLink (Online service)<br/>Preferred Shelf Number&#160;ONLINE<br/>Electronic Access&#160;<a href="https://doi.org/10.1007/978-3-319-57685-5">https://doi.org/10.1007/978-3-319-57685-5</a><br/>Format:&#160;Electronic Resources<br/>Availability&#160;Online Library~1<br/> Test Pattern Generation using Boolean Proof Engines ent://SD_ILS/0/SD_ILS:204765 2024-09-27T04:20:14Z 2024-09-27T04:20:14Z Author&#160;Drechsler, Rolf. author.&#160;Eggersgl&uuml;&beta;, Stephan. author.&#160;Fey, G&ouml;rschwin. author.&#160;Tille, Daniel. author.&#160;SpringerLink (Online service)<br/>Preferred Shelf Number&#160;ONLINE<br/>Electronic Access&#160;<a href="http://dx.doi.org/10.1007/978-90-481-2360-5">http://dx.doi.org/10.1007/978-90-481-2360-5</a><br/>Format:&#160;Electronic Resources<br/>Availability&#160;Online Library~1<br/> Advanced Logic Synthesis ent://SD_ILS/0/SD_ILS:402203 2024-09-27T04:20:14Z 2024-09-27T04:20:14Z Author&#160;Reis, Andr&eacute; In&aacute;cio. editor.&#160;Drechsler, Rolf. editor.&#160;SpringerLink (Online service)<br/>Preferred Shelf Number&#160;ONLINE<br/>Electronic Access&#160;<a href="https://doi.org/10.1007/978-3-319-67295-3">https://doi.org/10.1007/978-3-319-67295-3</a><br/>Format:&#160;Electronic Resources<br/>Availability&#160;Online Library~1<br/> High Quality Test Pattern Generation and Boolean Satisfiability ent://SD_ILS/0/SD_ILS:173360 2024-09-27T04:20:14Z 2024-09-27T04:20:14Z Author&#160;Eggersgl&uuml;&szlig;, Stephan. author.&#160;Drechsler, Rolf. author.&#160;SpringerLink (Online service)<br/>Preferred Shelf Number&#160;ONLINE<br/>Electronic Access&#160;<a href="http://dx.doi.org/10.1007/978-1-4419-9976-4">http://dx.doi.org/10.1007/978-1-4419-9976-4</a><br/>Format:&#160;Electronic Resources<br/>Availability&#160;Online Library~1<br/> Debugging at the Electronic System Level ent://SD_ILS/0/SD_ILS:205442 2024-09-27T04:20:14Z 2024-09-27T04:20:14Z Author&#160;Rogin, Frank. author.&#160;Drechsler, Rolf. author.&#160;SpringerLink (Online service)<br/>Preferred Shelf Number&#160;ONLINE<br/>Electronic Access&#160;<a href="http://dx.doi.org/10.1007/978-90-481-9255-7">http://dx.doi.org/10.1007/978-90-481-9255-7</a><br/>Format:&#160;Electronic Resources<br/>Availability&#160;Online Library~1<br/> Quality-Driven SystemC Design ent://SD_ILS/0/SD_ILS:205136 2024-09-27T04:20:14Z 2024-09-27T04:20:14Z Author&#160;Gro&szlig;e, Daniel. author.&#160;Drechsler, Rolf. author.&#160;SpringerLink (Online service)<br/>Preferred Shelf Number&#160;ONLINE<br/>Electronic Access&#160;<a href="http://dx.doi.org/10.1007/978-90-481-3631-5">http://dx.doi.org/10.1007/978-90-481-3631-5</a><br/>Format:&#160;Electronic Resources<br/>Availability&#160;Online Library~1<br/> Towards a Design Flow for Reversible Logic ent://SD_ILS/0/SD_ILS:205530 2024-09-27T04:20:14Z 2024-09-27T04:20:14Z Author&#160;Wille, Robert. author.&#160;Drechsler, Rolf. author.&#160;SpringerLink (Online service)<br/>Preferred Shelf Number&#160;ONLINE<br/>Electronic Access&#160;<a href="http://dx.doi.org/10.1007/978-90-481-9579-4">http://dx.doi.org/10.1007/978-90-481-9579-4</a><br/>Format:&#160;Electronic Resources<br/>Availability&#160;Online Library~1<br/> Robustness and Usability in Modern Design Flows ent://SD_ILS/0/SD_ILS:169847 2024-09-27T04:20:14Z 2024-09-27T04:20:14Z Author&#160;Fey, G&ouml;rschwin. author.&#160;Drechsler, Rolf. author.&#160;SpringerLink (Online service)<br/>Preferred Shelf Number&#160;ONLINE<br/>Electronic Access&#160;<a href="http://dx.doi.org/10.1007/978-1-4020-6536-1">http://dx.doi.org/10.1007/978-1-4020-6536-1</a><br/>Format:&#160;Electronic Resources<br/>Availability&#160;Online Library~1<br/> Automated Validation &amp; Verification of UML/OCL Models Using Satisfiability Solvers ent://SD_ILS/0/SD_ILS:401280 2024-09-27T04:20:14Z 2024-09-27T04:20:14Z Author&#160;Przigoda, Nils. author.&#160;Wille, Robert. author.&#160;Przigoda, Judith. author.&#160;Drechsler, Rolf. author.&#160;SpringerLink (Online service)<br/>Preferred Shelf Number&#160;ONLINE<br/>Electronic Access&#160;<a href="https://doi.org/10.1007/978-3-319-72814-8">https://doi.org/10.1007/978-3-319-72814-8</a><br/>Format:&#160;Electronic Resources<br/>Availability&#160;Online Library~1<br/> Advanced BDD Optimization ent://SD_ILS/0/SD_ILS:165137 2024-09-27T04:20:14Z 2024-09-27T04:20:14Z Author&#160;Ebendt, R&uuml;diger. author.&#160;Fey, G&ouml;rschwin. author.&#160;Drechsler, Rolf. author.&#160;SpringerLink (Online service)<br/>Preferred Shelf Number&#160;ONLINE<br/>Electronic Access&#160;<a href="http://dx.doi.org/10.1007/b107399">http://dx.doi.org/10.1007/b107399</a><br/>Format:&#160;Electronic Resources<br/>Availability&#160;Online Library~1<br/>