Search Results for Integrated circuits. - Narrowed by: Processor Architectures. SirsiDynix Enterprise https://katalog.hacettepe.edu.tr/client/en_US/default/default/qu$003dIntegrated$002bcircuits.$0026qf$003dSUBJECT$002509Subject$002509Processor$002bArchitectures.$002509Processor$002bArchitectures.$0026pe$003dd$00253A$0026ps$003d300?dt=list 2026-03-23T00:35:54Z Integrated Electronic Circuits ent://SD_ILS/0/SD_ILS:604652 2026-03-23T00:35:54Z 2026-03-23T00:35:54Z Author&#160;Atallah, Jad G. author.&#160;Ismail, Mohammed. author.&#160;SpringerLink (Online service)<br/>Preferred Shelf Number&#160;ONLINE<br/>Electronic Access&#160;<a href="https://doi.org/10.1007/978-3-031-62707-1">https://doi.org/10.1007/978-3-031-62707-1</a><br/>Format:&#160;Electronic Resources<br/>Availability&#160;Online Library~1<br/> Counterfeit Integrated Circuits Detection and Avoidance ent://SD_ILS/0/SD_ILS:530174 2026-03-23T00:35:54Z 2026-03-23T00:35:54Z Author&#160;Tehranipoor, Mark (Mohammad). author.&#160;Guin, Ujjwal. author.&#160;Forte, Domenic. author.&#160;SpringerLink (Online service)<br/>Preferred Shelf Number&#160;ONLINE<br/>Electronic Access&#160;<a href="https://doi.org/10.1007/978-3-319-11824-6">https://doi.org/10.1007/978-3-319-11824-6</a><br/>Format:&#160;Electronic Resources<br/>Availability&#160;Online Library~1<br/> Designing TSVs for 3D Integrated Circuits ent://SD_ILS/0/SD_ILS:331791 2026-03-23T00:35:54Z 2026-03-23T00:35:54Z Author&#160;Khan, Nauman. author.&#160;Hassoun, Soha. author.&#160;SpringerLink (Online service)<br/>Preferred Shelf Number&#160;ONLINE(331791.1)<br/>Electronic Access&#160;<a href="http://dx.doi.org/10.1007/978-1-4614-5508-0">http://dx.doi.org/10.1007/978-1-4614-5508-0</a><br/>Format:&#160;Electronic Resources<br/>Availability&#160;Online Library~1<br/> Testing of Interposer-Based 2.5D Integrated Circuits ent://SD_ILS/0/SD_ILS:616892 2026-03-23T00:35:54Z 2026-03-23T00:35:54Z Author&#160;Wang, Ran. author.&#160;Chakrabarty, Krishnendu. author.&#160;SpringerLink (Online service)<br/>Preferred Shelf Number&#160;ONLINE<br/>Electronic Access&#160;<a href="https://doi.org/10.1007/978-3-319-54714-5">https://doi.org/10.1007/978-3-319-54714-5</a><br/>Format:&#160;Electronic Resources<br/>Availability&#160;Online Library~1<br/> Hardware Security and Trust Design and Deployment of Integrated Circuits in a Threatened Environment ent://SD_ILS/0/SD_ILS:616798 2026-03-23T00:35:54Z 2026-03-23T00:35:54Z Author&#160;Sklavos, Nicolas. editor.&#160;Chaves, Ricardo. editor.&#160;Di Natale, Giorgio. editor.&#160;Regazzoni, Francesco. editor.&#160;SpringerLink (Online service)<br/>Preferred Shelf Number&#160;ONLINE<br/>Electronic Access&#160;<a href="https://doi.org/10.1007/978-3-319-44318-8">https://doi.org/10.1007/978-3-319-44318-8</a><br/>Format:&#160;Electronic Resources<br/>Availability&#160;Online Library~1<br/> Arbitrary Modeling of TSVs for 3D Integrated Circuits ent://SD_ILS/0/SD_ILS:529725 2026-03-23T00:35:54Z 2026-03-23T00:35:54Z Author&#160;Salah, Khaled. author.&#160;Ismail, Yehea. author.&#160;El-Rouby, Alaa. author.&#160;SpringerLink (Online service)<br/>Preferred Shelf Number&#160;ONLINE<br/>Electronic Access&#160;<a href="https://doi.org/10.1007/978-3-319-07611-9">https://doi.org/10.1007/978-3-319-07611-9</a><br/>Format:&#160;Electronic Resources<br/>Availability&#160;Online Library~1<br/> Design for High Performance, Low Power, and Reliable 3D Integrated Circuits ent://SD_ILS/0/SD_ILS:330852 2026-03-23T00:35:54Z 2026-03-23T00:35:54Z Author&#160;Lim, Sung Kyu. author.&#160;SpringerLink (Online service)<br/>Preferred Shelf Number&#160;ONLINE(330852.1)<br/>Electronic Access&#160;<a href="http://dx.doi.org/10.1007/978-1-4419-9542-1">http://dx.doi.org/10.1007/978-1-4419-9542-1</a><br/>Format:&#160;Electronic Resources<br/>Availability&#160;Online Library~1<br/> Fundamentals of Electromigration-Aware Integrated Circuit Design ent://SD_ILS/0/SD_ILS:607413 2026-03-23T00:35:54Z 2026-03-23T00:35:54Z Author&#160;Lienig, Jens. author. (orcid)0000-0002-2140-4587&#160;Rothe, Susann. author.&#160;Thiele, Matthias. author.&#160;SpringerLink (Online service)<br/>Preferred Shelf Number&#160;ONLINE<br/>Electronic Access&#160;<a href="https://doi.org/10.1007/978-3-031-80023-8">https://doi.org/10.1007/978-3-031-80023-8</a><br/>Format:&#160;Electronic Resources<br/>Availability&#160;Online Library~1<br/> Bio/CMOS Interfaces and Co-Design ent://SD_ILS/0/SD_ILS:601734 2026-03-23T00:35:54Z 2026-03-23T00:35:54Z Author&#160;Carrara, Sandro. author.&#160;SpringerLink (Online service)<br/>Preferred Shelf Number&#160;ONLINE<br/>Electronic Access&#160;<a href="https://doi.org/10.1007/978-3-031-31832-0">https://doi.org/10.1007/978-3-031-31832-0</a><br/>Format:&#160;Electronic Resources<br/>Availability&#160;Online Library~1<br/> From Variability Tolerance to Approximate Computing in Parallel Integrated Architectures and Accelerators ent://SD_ILS/0/SD_ILS:610732 2026-03-23T00:35:54Z 2026-03-23T00:35:54Z Author&#160;Rahimi, Abbas. author.&#160;Benini, Luca. author.&#160;Gupta, Rajesh K. author.&#160;SpringerLink (Online service)<br/>Preferred Shelf Number&#160;ONLINE<br/>Electronic Access&#160;<a href="https://doi.org/10.1007/978-3-319-53768-9">https://doi.org/10.1007/978-3-319-53768-9</a><br/>Format:&#160;Electronic Resources<br/>Availability&#160;Online Library~1<br/> Hardware Protection through Obfuscation ent://SD_ILS/0/SD_ILS:613957 2026-03-23T00:35:54Z 2026-03-23T00:35:54Z Author&#160;Forte, Domenic. editor.&#160;Bhunia, Swarup. editor.&#160;Tehranipoor, Mark M. editor.&#160;SpringerLink (Online service)<br/>Preferred Shelf Number&#160;ONLINE<br/>Electronic Access&#160;<a href="https://doi.org/10.1007/978-3-319-49019-9">https://doi.org/10.1007/978-3-319-49019-9</a><br/>Format:&#160;Electronic Resources<br/>Availability&#160;Online Library~1<br/> Carbon Nanotubes for Interconnects Process, Design and Applications ent://SD_ILS/0/SD_ILS:614055 2026-03-23T00:35:54Z 2026-03-23T00:35:54Z Author&#160;Todri-Sanial, Aida. editor.&#160;Dijon, Jean. editor.&#160;Maffucci, Antonio. editor.&#160;SpringerLink (Online service)<br/>Preferred Shelf Number&#160;ONLINE<br/>Electronic Access&#160;<a href="https://doi.org/10.1007/978-3-319-29746-0">https://doi.org/10.1007/978-3-319-29746-0</a><br/>Format:&#160;Electronic Resources<br/>Availability&#160;Online Library~1<br/> Automatic Analog IC Sizing and Optimization Constrained with PVT Corners and Layout Effects ent://SD_ILS/0/SD_ILS:616475 2026-03-23T00:35:54Z 2026-03-23T00:35:54Z Author&#160;Louren&ccedil;o, Nuno. author.&#160;Martins, Ricardo. author. (orcid)0000-0002-8251-1415&#160;Horta, Nuno. author.&#160;SpringerLink (Online service)<br/>Preferred Shelf Number&#160;ONLINE<br/>Electronic Access&#160;<a href="https://doi.org/10.1007/978-3-319-42037-0">https://doi.org/10.1007/978-3-319-42037-0</a><br/>Format:&#160;Electronic Resources<br/>Availability&#160;Online Library~1<br/> Languages, Design Methods, and Tools for Electronic System Design Selected Contributions from FDL 2015 ent://SD_ILS/0/SD_ILS:612100 2026-03-23T00:35:54Z 2026-03-23T00:35:54Z Author&#160;Drechsler, Rolf. editor.&#160;Wille, Robert. editor.&#160;SpringerLink (Online service)<br/>Preferred Shelf Number&#160;ONLINE<br/>Electronic Access&#160;<a href="https://doi.org/10.1007/978-3-319-31723-6">https://doi.org/10.1007/978-3-319-31723-6</a><br/>Format:&#160;Electronic Resources<br/>Availability&#160;Online Library~1<br/>