Search Results for Khatri, Sunil P. SirsiDynix Enterprise https://katalog.hacettepe.edu.tr/client/en_US/default/default/qu$003dKhatri$00252C$002bSunil$002bP.$0026ps$003d300? 2024-11-02T21:04:49Z Logic Synthesis for Genetic Diseases Modeling Disease Behavior Using Boolean Networks ent://SD_ILS/0/SD_ILS:487351 2024-11-02T21:04:49Z 2024-11-02T21:04:49Z Author&#160;Lin, Pey-Chang Kent. author.&#160;Khatri, Sunil P. author.&#160;SpringerLink (Online service)<br/>Preferred Shelf Number&#160;ONLINE<br/>Electronic Access&#160;<a href="https://doi.org/10.1007/978-1-4614-9429-4">https://doi.org/10.1007/978-1-4614-9429-4</a><br/>Format:&#160;Electronic Resources<br/>Availability&#160;Online Library~1<br/> Analysis and Design of Resilient VLSI Circuits Mitigating Soft Errors and Process Variations ent://SD_ILS/0/SD_ILS:172101 2024-11-02T21:04:49Z 2024-11-02T21:04:49Z Author&#160;Garg, Rajesh. author.&#160;Khatri, Sunil P. author.&#160;SpringerLink (Online service)<br/>Preferred Shelf Number&#160;ONLINE<br/>Electronic Access&#160;<a href="http://dx.doi.org/10.1007/978-1-4419-0931-2">http://dx.doi.org/10.1007/978-1-4419-0931-2</a><br/>Format:&#160;Electronic Resources<br/>Availability&#160;Online Library~1<br/> Hardware Acceleration of EDA Algorithms Custom ICs, FPGAs and GPUs ent://SD_ILS/0/SD_ILS:172105 2024-11-02T21:04:49Z 2024-11-02T21:04:49Z Author&#160;Gulati, Kanupriya. author.&#160;Khatri, Sunil P. author.&#160;SpringerLink (Online service)<br/>Preferred Shelf Number&#160;ONLINE<br/>Electronic Access&#160;<a href="http://dx.doi.org/10.1007/978-1-4419-0944-2">http://dx.doi.org/10.1007/978-1-4419-0944-2</a><br/>Format:&#160;Electronic Resources<br/>Availability&#160;Online Library~1<br/> Source-Synchronous Networks-On-Chip Circuit and Architectural Interconnect Modeling ent://SD_ILS/0/SD_ILS:484822 2024-11-02T21:04:49Z 2024-11-02T21:04:49Z Author&#160;Mandal, Ayan. author.&#160;Khatri, Sunil P. author.&#160;Mahapatra, Rabi. author.&#160;SpringerLink (Online service)<br/>Preferred Shelf Number&#160;ONLINE<br/>Electronic Access&#160;<a href="https://doi.org/10.1007/978-1-4614-9405-8">https://doi.org/10.1007/978-1-4614-9405-8</a><br/>Format:&#160;Electronic Resources<br/>Availability&#160;Online Library~1<br/> On and Off-Chip Crosstalk Avoidance in VLSI Design ent://SD_ILS/0/SD_ILS:172106 2024-11-02T21:04:49Z 2024-11-02T21:04:49Z Author&#160;Duan, Chunjie. author.&#160;LaMeres, Brock J. author.&#160;Khatri, Sunil P. author.&#160;SpringerLink (Online service)<br/>Preferred Shelf Number&#160;ONLINE<br/>Electronic Access&#160;<a href="http://dx.doi.org/10.1007/978-1-4419-0947-3">http://dx.doi.org/10.1007/978-1-4419-0947-3</a><br/>Format:&#160;Electronic Resources<br/>Availability&#160;Online Library~1<br/> Minimizing and Exploiting Leakage in VLSI Design ent://SD_ILS/0/SD_ILS:172107 2024-11-02T21:04:49Z 2024-11-02T21:04:49Z Author&#160;Jayakumar, Nikhil. author.&#160;Paul, Suganth. author.&#160;Garg, Rajesh. author.&#160;Gulati, Kanupriya. author.&#160;Khatri, Sunil P. author.<br/>Preferred Shelf Number&#160;ONLINE<br/>Electronic Access&#160;<a href="http://dx.doi.org/10.1007/978-1-4419-0950-3">http://dx.doi.org/10.1007/978-1-4419-0950-3</a><br/>Format:&#160;Electronic Resources<br/>Availability&#160;Online Library~1<br/>