Search Results for Logic design - Narrowed by: Electronic Library - Logic design. - Memory management (Computer science).
SirsiDynix Enterprise
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Computer Engineering and Technology 17th CCF Conference, NCCET 2013, Xining, China, July 20-22, 2013. Revised Selected Papers
ent://SD_ILS/0/SD_ILS:335131
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Author Xu, Weixia. editor. Xiao, Liquan. editor. Zhang, Chengyi. editor. Li, Jinwen. editor. Yu, Liyan. editor.<br/>Preferred Shelf Number ONLINE(335131.1)<br/>Electronic Access <a href="http://dx.doi.org/10.1007/978-3-642-41635-4">http://dx.doi.org/10.1007/978-3-642-41635-4</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>
Computer Engineering and Technology 16th National Conference, NCCET 2012, Shanghai, China, August 17-19, 2012, Revised Selected Papers
ent://SD_ILS/0/SD_ILS:334080
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Author Xu, Weixia. editor. Xiao, Liquan. editor. Lu, Pingjing. editor. Li, Jinwen. editor. Zhang, Chengyi. editor.<br/>Preferred Shelf Number ONLINE(334080.1)<br/>Electronic Access <a href="http://dx.doi.org/10.1007/978-3-642-35898-2">http://dx.doi.org/10.1007/978-3-642-35898-2</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>
Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation 19th International Workshop, PATMOS 2009, Delft, The Netherlands, September 9-11, 2009, Revised Selected Papers
ent://SD_ILS/0/SD_ILS:191802
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Author Monteiro, José. editor. Leuken, René. editor. SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="http://dx.doi.org/10.1007/978-3-642-11802-9">http://dx.doi.org/10.1007/978-3-642-11802-9</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>
Computer Performance Evaluation and Benchmarking SPEC Benchmark Workshop 2009, Austin, TX, USA, January 25, 2009. Proceedings
ent://SD_ILS/0/SD_ILS:189510
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Author Kaeli, David. editor. Sachs, Kai. editor. SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="http://dx.doi.org/10.1007/978-3-540-93799-9">http://dx.doi.org/10.1007/978-3-540-93799-9</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>
Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation 18th International Workshop, PATMOS 2008, Lisbon, Portugal, September 10-12, 2008. Revised Selected Papers
ent://SD_ILS/0/SD_ILS:189565
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Author Svensson, Lars. editor. Monteiro, José. editor. SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="http://dx.doi.org/10.1007/978-3-540-95948-9">http://dx.doi.org/10.1007/978-3-540-95948-9</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>
Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation 17th International Workshop, PATMOS 2007, Gothenburg, Sweden, September 3-5, 2007. Proceedings
ent://SD_ILS/0/SD_ILS:187155
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Author Azémard, Nadine. editor. Svensson, Lars. editor. SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="http://dx.doi.org/10.1007/978-3-540-74442-9">http://dx.doi.org/10.1007/978-3-540-74442-9</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>
Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation 16th International Workshop, PATMOS 2006, Montpellier, France, September 13-15, 2006. Proceedings
ent://SD_ILS/0/SD_ILS:184718
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Author Vounckx, Johan. editor. Azemard, Nadine. editor. Maurine, Philippe. editor. SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="http://dx.doi.org/10.1007/11847083">http://dx.doi.org/10.1007/11847083</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>