Search Results for Logic design. - Narrowed by: Electronics. SirsiDynix Enterprise https://katalog.hacettepe.edu.tr/client/en_US/default/default/qu$003dLogic$002bdesign.$0026qf$003dSUBJECT$002509Subject$002509Electronics.$002509Electronics.$0026ic$003dtrue$0026ps$003d300?dt=list 2024-11-27T08:48:07Z Design Automation for Differential MOS Current-Mode Logic Circuits ent://SD_ILS/0/SD_ILS:486703 2024-11-27T08:48:07Z 2024-11-27T08:48:07Z Author&#160;Badel, St&eacute;phane. author.&#160;Baltaci, Can. author.&#160;Cevrero, Alessandro. author.&#160;Leblebici, Yusuf. author.&#160;SpringerLink (Online service)<br/>Preferred Shelf Number&#160;ONLINE<br/>Electronic Access&#160;<a href="https://doi.org/10.1007/978-3-319-91307-0">https://doi.org/10.1007/978-3-319-91307-0</a><br/>Format:&#160;Electronic Resources<br/>Availability&#160;Online Library~1<br/> Fundamentals of Switching Theory and Logic Design A Hands on Approach ent://SD_ILS/0/SD_ILS:165712 2024-11-27T08:48:07Z 2024-11-27T08:48:07Z Author&#160;Astola, Jaakko T. author.&#160;Stankovi&#263;, Radomir S. author.&#160;SpringerLink (Online service)<br/>Preferred Shelf Number&#160;ONLINE<br/>Electronic Access&#160;<a href="http://dx.doi.org/10.1007/0-387-30311-1">http://dx.doi.org/10.1007/0-387-30311-1</a><br/>Format:&#160;Electronic Resources<br/>Availability&#160;Online Library~1<br/> Model and Design of Bipolar and MOS Current-Mode Logic CML, ECL and SCL Digital Circuits ent://SD_ILS/0/SD_ILS:168770 2024-11-27T08:48:07Z 2024-11-27T08:48:07Z Author&#160;Alioto, Massimo. author.&#160;Palumbo, Gaetano. author.&#160;SpringerLink (Online service)<br/>Preferred Shelf Number&#160;ONLINE<br/>Electronic Access&#160;<a href="http://dx.doi.org/10.1007/1-4020-2888-1">http://dx.doi.org/10.1007/1-4020-2888-1</a><br/>Format:&#160;Electronic Resources<br/>Availability&#160;Online Library~1<br/> Principles and Structures of FPGAs ent://SD_ILS/0/SD_ILS:399651 2024-11-27T08:48:07Z 2024-11-27T08:48:07Z Author&#160;Amano, Hideharu. editor.&#160;SpringerLink (Online service)<br/>Preferred Shelf Number&#160;ONLINE<br/>Electronic Access&#160;<a href="https://doi.org/10.1007/978-981-13-0824-6">https://doi.org/10.1007/978-981-13-0824-6</a><br/>Format:&#160;Electronic Resources<br/>Availability&#160;Online Library~1<br/> Adiabatic Logic Future Trend and System Level Perspective ent://SD_ILS/0/SD_ILS:206336 2024-11-27T08:48:07Z 2024-11-27T08:48:07Z Author&#160;Teichmann, Philip. author.&#160;SpringerLink (Online service)<br/>Preferred Shelf Number&#160;ONLINE<br/>Electronic Access&#160;<a href="http://dx.doi.org/10.1007/978-94-007-2345-0">http://dx.doi.org/10.1007/978-94-007-2345-0</a><br/>Format:&#160;Electronic Resources<br/>Availability&#160;Online Library~1<br/> Entwurf integrierter 3D-Systeme der Elektronik ent://SD_ILS/0/SD_ILS:196921 2024-11-27T08:48:07Z 2024-11-27T08:48:07Z Author&#160;Lienig, Jens. editor.&#160;Dietrich, Manfred. editor.&#160;SpringerLink (Online service)<br/>Preferred Shelf Number&#160;ONLINE<br/>Electronic Access&#160;<a href="http://dx.doi.org/10.1007/978-3-642-30572-6">http://dx.doi.org/10.1007/978-3-642-30572-6</a><br/>Format:&#160;Electronic Resources<br/>Availability&#160;Online Library~1<br/> VLSI Physical Design: From Graph Partitioning to Timing Closure ent://SD_ILS/0/SD_ILS:205534 2024-11-27T08:48:07Z 2024-11-27T08:48:07Z Author&#160;Kahng, Andrew B. author.&#160;Lienig, Jens. author.&#160;Markov, Igor L. author.&#160;Hu, Jin. author.&#160;SpringerLink (Online service)<br/>Preferred Shelf Number&#160;ONLINE<br/>Electronic Access&#160;<a href="http://dx.doi.org/10.1007/978-90-481-9591-6">http://dx.doi.org/10.1007/978-90-481-9591-6</a><br/>Format:&#160;Electronic Resources<br/>Availability&#160;Online Library~1<br/> Logic Synthesis for FSM-Based Control Units ent://SD_ILS/0/SD_ILS:190905 2024-11-27T08:48:07Z 2024-11-27T08:48:07Z Author&#160;Barkalov, Alexander. author.&#160;Titarenko, Larysa. author.&#160;SpringerLink (Online service)<br/>Preferred Shelf Number&#160;ONLINE<br/>Electronic Access&#160;<a href="http://dx.doi.org/10.1007/978-3-642-04309-3">http://dx.doi.org/10.1007/978-3-642-04309-3</a><br/>Format:&#160;Electronic Resources<br/>Availability&#160;Online Library~1<br/> More than Moore Creating High Value Micro/Nanoelectronics Systems ent://SD_ILS/0/SD_ILS:167281 2024-11-27T08:48:07Z 2024-11-27T08:48:07Z Author&#160;Zhang, Guo Qi. editor.&#160;Roosmalen, Alfred. editor.&#160;SpringerLink (Online service)<br/>Preferred Shelf Number&#160;ONLINE<br/>Electronic Access&#160;<a href="http://dx.doi.org/10.1007/978-0-387-75593-9">http://dx.doi.org/10.1007/978-0-387-75593-9</a><br/>Format:&#160;Electronic Resources<br/>Availability&#160;Online Library~1<br/> Logic Synthesis for Compositional Microprogram Control Units ent://SD_ILS/0/SD_ILS:185766 2024-11-27T08:48:07Z 2024-11-27T08:48:07Z Author&#160;Barkalov, Alexander. editor.&#160;Titarenko, Larysa. editor.&#160;SpringerLink (Online service)<br/>Preferred Shelf Number&#160;ONLINE<br/>Electronic Access&#160;<a href="http://dx.doi.org/10.1007/978-3-540-69285-0">http://dx.doi.org/10.1007/978-3-540-69285-0</a><br/>Format:&#160;Electronic Resources<br/>Availability&#160;Online Library~1<br/> A Roadmap for Formal Property Verification ent://SD_ILS/0/SD_ILS:169271 2024-11-27T08:48:07Z 2024-11-27T08:48:07Z Author&#160;DasGupta, Pallab. author.&#160;SpringerLink (Online service)<br/>Preferred Shelf Number&#160;ONLINE<br/>Electronic Access&#160;<a href="http://dx.doi.org/10.1007/978-1-4020-4758-9">http://dx.doi.org/10.1007/978-1-4020-4758-9</a><br/>Format:&#160;Electronic Resources<br/>Availability&#160;Online Library~1<br/> Layoutsynthese elektronischer Schaltungen &mdash; Grundlegende Algorithmen f&uuml;r die Entwurfsautomatisierung ent://SD_ILS/0/SD_ILS:182190 2024-11-27T08:48:07Z 2024-11-27T08:48:07Z Author&#160;Lienig, Jens. author.&#160;SpringerLink (Online service)<br/>Preferred Shelf Number&#160;ONLINE<br/>Electronic Access&#160;<a href="http://dx.doi.org/10.1007/3-540-29942-4">http://dx.doi.org/10.1007/3-540-29942-4</a><br/>Format:&#160;Electronic Resources<br/>Availability&#160;Online Library~1<br/> Logischer Entwurf digitaler Systeme ent://SD_ILS/0/SD_ILS:182032 2024-11-27T08:48:07Z 2024-11-27T08:48:07Z Author&#160;Liebig, Hans. author.&#160;SpringerLink (Online service)<br/>Preferred Shelf Number&#160;ONLINE<br/>Electronic Access&#160;<a href="http://dx.doi.org/10.1007/3-540-29430-9">http://dx.doi.org/10.1007/3-540-29430-9</a><br/>Format:&#160;Electronic Resources<br/>Availability&#160;Online Library~1<br/> Fault-Tolerance Techniques for SRAM-based FPGAs ent://SD_ILS/0/SD_ILS:165779 2024-11-27T08:48:07Z 2024-11-27T08:48:07Z Author&#160;Kastensmidt, Fernanda Lima. author.&#160;Carro, Luigi. author.&#160;Reis, Ricardo. author.&#160;SpringerLink (Online service)<br/>Preferred Shelf Number&#160;ONLINE<br/>Electronic Access&#160;<a href="http://dx.doi.org/10.1007/978-0-387-31069-5">http://dx.doi.org/10.1007/978-0-387-31069-5</a><br/>Format:&#160;Electronic Resources<br/>Availability&#160;Online Library~1<br/> New Algorithms, Architectures and Applications for Reconfigurable Computing ent://SD_ILS/0/SD_ILS:168817 2024-11-27T08:48:07Z 2024-11-27T08:48:07Z Author&#160;Lysaght, Patrick. editor.&#160;Rosenstiel, Wolfgang. editor.&#160;SpringerLink (Online service)<br/>Preferred Shelf Number&#160;ONLINE<br/>Electronic Access&#160;<a href="http://dx.doi.org/10.1007/1-4020-3128-9">http://dx.doi.org/10.1007/1-4020-3128-9</a><br/>Format:&#160;Electronic Resources<br/>Availability&#160;Online Library~1<br/> Taxonomies for the Development and Verification of Digital Systems ent://SD_ILS/0/SD_ILS:165002 2024-11-27T08:48:07Z 2024-11-27T08:48:07Z Author&#160;Bailey, Brian. editor.&#160;Martin, Grant. editor.&#160;Anderson, Thomas. editor.&#160;SpringerLink (Online service)<br/>Preferred Shelf Number&#160;ONLINE<br/>Electronic Access&#160;<a href="http://dx.doi.org/10.1007/b104217">http://dx.doi.org/10.1007/b104217</a><br/>Format:&#160;Electronic Resources<br/>Availability&#160;Online Library~1<br/>