Search Results for Logic. - Narrowed by: E-Book - Systems engineering. SirsiDynix Enterprise https://katalog.hacettepe.edu.tr/client/en_US/default/default/qu$003dLogic.$0026qf$003dITYPE$002509Material$002bType$0025091$00253AE-KITAP$002509E-Book$0026qf$003dSUBJECT$002509Subject$002509Systems$002bengineering.$002509Systems$002bengineering.$0026ic$003dtrue$0026te$003dILS$0026ps$003d300$0026isd$003dtrue? 2024-09-03T04:32:05Z Advanced Logic Synthesis ent://SD_ILS/0/SD_ILS:402203 2024-09-03T04:32:05Z 2024-09-03T04:32:05Z Author&#160;Reis, Andr&eacute; In&aacute;cio. editor.&#160;Drechsler, Rolf. editor.&#160;SpringerLink (Online service)<br/>Preferred Shelf Number&#160;ONLINE<br/>Electronic Access&#160;<a href="https://doi.org/10.1007/978-3-319-67295-3">https://doi.org/10.1007/978-3-319-67295-3</a><br/>Format:&#160;Electronic Resources<br/>Availability&#160;Online Library~1<br/> Memory-Based Logic Synthesis ent://SD_ILS/0/SD_ILS:173066 2024-09-03T04:32:05Z 2024-09-03T04:32:05Z Author&#160;Sasao, Tsutomu. author.&#160;SpringerLink (Online service)<br/>Preferred Shelf Number&#160;ONLINE<br/>Electronic Access&#160;<a href="http://dx.doi.org/10.1007/978-1-4419-8104-2">http://dx.doi.org/10.1007/978-1-4419-8104-2</a><br/>Format:&#160;Electronic Resources<br/>Availability&#160;Online Library~1<br/> Logic Circuit Design Selected Methods ent://SD_ILS/0/SD_ILS:196263 2024-09-03T04:32:05Z 2024-09-03T04:32:05Z Author&#160;Vingron, Shimon P. author.&#160;SpringerLink (Online service)<br/>Preferred Shelf Number&#160;ONLINE<br/>Electronic Access&#160;<a href="http://dx.doi.org/10.1007/978-3-642-27657-6">http://dx.doi.org/10.1007/978-3-642-27657-6</a><br/>Format:&#160;Electronic Resources<br/>Availability&#160;Online Library~1<br/> Towards a Design Flow for Reversible Logic ent://SD_ILS/0/SD_ILS:205530 2024-09-03T04:32:05Z 2024-09-03T04:32:05Z Author&#160;Wille, Robert. author.&#160;Drechsler, Rolf. author.&#160;SpringerLink (Online service)<br/>Preferred Shelf Number&#160;ONLINE<br/>Electronic Access&#160;<a href="http://dx.doi.org/10.1007/978-90-481-9579-4">http://dx.doi.org/10.1007/978-90-481-9579-4</a><br/>Format:&#160;Electronic Resources<br/>Availability&#160;Online Library~1<br/> Logic Synthesis for FSM-Based Control Units ent://SD_ILS/0/SD_ILS:190905 2024-09-03T04:32:05Z 2024-09-03T04:32:05Z Author&#160;Barkalov, Alexander. author.&#160;Titarenko, Larysa. author.&#160;SpringerLink (Online service)<br/>Preferred Shelf Number&#160;ONLINE<br/>Electronic Access&#160;<a href="http://dx.doi.org/10.1007/978-3-642-04309-3">http://dx.doi.org/10.1007/978-3-642-04309-3</a><br/>Format:&#160;Electronic Resources<br/>Availability&#160;Online Library~1<br/> Logic Functions and Equations Examples and Exercises ent://SD_ILS/0/SD_ILS:170583 2024-09-03T04:32:05Z 2024-09-03T04:32:05Z Author&#160;Steinbach, Bernd. author.&#160;Posthoff, Christian. author.&#160;SpringerLink (Online service)<br/>Preferred Shelf Number&#160;ONLINE<br/>Electronic Access&#160;<a href="http://dx.doi.org/10.1007/978-1-4020-9595-5">http://dx.doi.org/10.1007/978-1-4020-9595-5</a><br/>Format:&#160;Electronic Resources<br/>Availability&#160;Online Library~1<br/> Logic Synthesis for Compositional Microprogram Control Units ent://SD_ILS/0/SD_ILS:185766 2024-09-03T04:32:05Z 2024-09-03T04:32:05Z Author&#160;Barkalov, Alexander. editor.&#160;Titarenko, Larysa. editor.&#160;SpringerLink (Online service)<br/>Preferred Shelf Number&#160;ONLINE<br/>Electronic Access&#160;<a href="http://dx.doi.org/10.1007/978-3-540-69285-0">http://dx.doi.org/10.1007/978-3-540-69285-0</a><br/>Format:&#160;Electronic Resources<br/>Availability&#160;Online Library~1<br/> Computation Engineering Applied Automata Theory and Logic ent://SD_ILS/0/SD_ILS:165858 2024-09-03T04:32:05Z 2024-09-03T04:32:05Z Author&#160;Gopalakrishnan, Ganesh. author.&#160;SpringerLink (Online service)<br/>Preferred Shelf Number&#160;ONLINE<br/>Electronic Access&#160;<a href="http://dx.doi.org/10.1007/0-387-32520-4">http://dx.doi.org/10.1007/0-387-32520-4</a><br/>Format:&#160;Electronic Resources<br/>Availability&#160;Online Library~1<br/> Logic Synthesis for Finite State Machines Based on Linear Chains of States Foundations, Recent Developments and Challenges ent://SD_ILS/0/SD_ILS:400169 2024-09-03T04:32:05Z 2024-09-03T04:32:05Z Author&#160;Barkalov, Alexander. author.&#160;Titarenko, Larysa. author.&#160;Bieganowski, Jacek. author.&#160;SpringerLink (Online service)<br/>Preferred Shelf Number&#160;ONLINE<br/>Electronic Access&#160;<a href="https://doi.org/10.1007/978-3-319-59837-6">https://doi.org/10.1007/978-3-319-59837-6</a><br/>Format:&#160;Electronic Resources<br/>Availability&#160;Online Library~1<br/> Design, Analysis and Test of Logic Circuits Under Uncertainty ent://SD_ILS/0/SD_ILS:335669 2024-09-03T04:32:05Z 2024-09-03T04:32:05Z Author&#160;Krishnaswamy, Smita. author.&#160;Markov, Igor L. author.&#160;Hayes, John P. author.&#160;SpringerLink (Online service)<br/>Preferred Shelf Number&#160;ONLINE(335669.1)<br/>Electronic Access&#160;<a href="http://dx.doi.org/10.1007/978-90-481-9644-9">http://dx.doi.org/10.1007/978-90-481-9644-9</a><br/>Format:&#160;Electronic Resources<br/>Availability&#160;Online Library~1<br/> Finite State Machine Logic Synthesis for Complex Programmable Logic Devices ent://SD_ILS/0/SD_ILS:334139 2024-09-03T04:32:05Z 2024-09-03T04:32:05Z Author&#160;Czerwinski, Robert. author.&#160;Kania, Dariusz. author.&#160;SpringerLink (Online service)<br/>Preferred Shelf Number&#160;ONLINE(334139.1)<br/>Electronic Access&#160;<a href="http://dx.doi.org/10.1007/978-3-642-36166-1">http://dx.doi.org/10.1007/978-3-642-36166-1</a><br/>Format:&#160;Electronic Resources<br/>Availability&#160;Online Library~1<br/> Adiabatic Logic Future Trend and System Level Perspective ent://SD_ILS/0/SD_ILS:206336 2024-09-03T04:32:05Z 2024-09-03T04:32:05Z Author&#160;Teichmann, Philip. author.&#160;SpringerLink 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editor.&#160;SpringerLink (Online service)<br/>Preferred Shelf Number&#160;ONLINE<br/>Electronic Access&#160;<a href="http://dx.doi.org/10.1007/978-1-4419-7518-8">http://dx.doi.org/10.1007/978-1-4419-7518-8</a><br/>Format:&#160;Electronic Resources<br/>Availability&#160;Online Library~1<br/> From Boolean Logic to Switching Circuits and Automata Towards Modern Information Technology ent://SD_ILS/0/SD_ILS:191764 2024-09-03T04:32:05Z 2024-09-03T04:32:05Z Author&#160;Stankovi&#263;, Radomir S. author.&#160;Astola, Jaakko. author.&#160;SpringerLink (Online service)<br/>Preferred Shelf Number&#160;ONLINE<br/>Electronic Access&#160;<a href="http://dx.doi.org/10.1007/978-3-642-11682-7">http://dx.doi.org/10.1007/978-3-642-11682-7</a><br/>Format:&#160;Electronic Resources<br/>Availability&#160;Online Library~1<br/> Asynchronous Operators of Sequential Logic: Venjunction &amp; Sequention Digital Circuit Analysis and Design ent://SD_ILS/0/SD_ILS:194757 2024-09-03T04:32:05Z 2024-09-03T04:32:05Z Author&#160;Vasyukevich, Vadim. author.&#160;SpringerLink (Online service)<br/>Preferred Shelf Number&#160;ONLINE<br/>Electronic Access&#160;<a href="http://dx.doi.org/10.1007/978-3-642-21611-4">http://dx.doi.org/10.1007/978-3-642-21611-4</a><br/>Format:&#160;Electronic Resources<br/>Availability&#160;Online Library~1<br/> Simulation and Optimization of Digital Circuits Considering and Mitigating Destabilizing Factors ent://SD_ILS/0/SD_ILS:399090 2024-09-03T04:32:05Z 2024-09-03T04:32:05Z Author&#160;Melikyan, Vazgen. author.&#160;SpringerLink (Online service)<br/>Preferred Shelf Number&#160;ONLINE<br/>Electronic Access&#160;<a href="https://doi.org/10.1007/978-3-319-71637-4">https://doi.org/10.1007/978-3-319-71637-4</a><br/>Format:&#160;Electronic Resources<br/>Availability&#160;Online Library~1<br/> Introduzione al Progetto di Sistemi Digitali ent://SD_ILS/0/SD_ILS:401180 2024-09-03T04:32:05Z 2024-09-03T04:32:05Z Author&#160;Donzellini, Giuliano. author.&#160;Oneto, Luca. author.&#160;Ponta, Domenico. author.&#160;Anguita, Davide. author.&#160;SpringerLink (Online service)<br/>Preferred Shelf Number&#160;ONLINE<br/>Electronic Access&#160;<a href="https://doi.org/10.1007/978-88-470-3963-6">https://doi.org/10.1007/978-88-470-3963-6</a><br/>Format:&#160;Electronic Resources<br/>Availability&#160;Online Library~1<br/> Design of FPGA-Based Computing Systems with OpenCL ent://SD_ILS/0/SD_ILS:401920 2024-09-03T04:32:05Z 2024-09-03T04:32:05Z Author&#160;Waidyasooriya, Hasitha Muthumala. author.&#160;Hariyama, Masanori. author.&#160;Uchiyama, Kunio. author.&#160;SpringerLink (Online service)<br/>Preferred Shelf Number&#160;ONLINE<br/>Electronic Access&#160;<a href="https://doi.org/10.1007/978-3-319-68161-0">https://doi.org/10.1007/978-3-319-68161-0</a><br/>Format:&#160;Electronic Resources<br/>Availability&#160;Online Library~1<br/> ASIC/SoC Functional Design Verification A Comprehensive Guide to Technologies and Methodologies ent://SD_ILS/0/SD_ILS:401372 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Author&#160;Sharma, Rohit. author.&#160;Chakravarty, Tapas. author.&#160;SpringerLink (Online service)<br/>Preferred Shelf Number&#160;ONLINE<br/>Electronic Access&#160;<a href="http://dx.doi.org/10.1007/978-1-4614-1071-3">http://dx.doi.org/10.1007/978-1-4614-1071-3</a><br/>Format:&#160;Electronic Resources<br/>Availability&#160;Online Library~1<br/> Entwurf integrierter 3D-Systeme der Elektronik ent://SD_ILS/0/SD_ILS:196921 2024-09-03T04:32:05Z 2024-09-03T04:32:05Z Author&#160;Lienig, Jens. editor.&#160;Dietrich, Manfred. editor.&#160;SpringerLink (Online service)<br/>Preferred Shelf Number&#160;ONLINE<br/>Electronic Access&#160;<a href="http://dx.doi.org/10.1007/978-3-642-30572-6">http://dx.doi.org/10.1007/978-3-642-30572-6</a><br/>Format:&#160;Electronic Resources<br/>Availability&#160;Online Library~1<br/> VLSI Physical Design: From Graph Partitioning to Timing Closure ent://SD_ILS/0/SD_ILS:205534 2024-09-03T04:32:05Z 2024-09-03T04:32:05Z Author&#160;Kahng, Andrew B. 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Power and Timing Modeling, Optimization and Simulation 18th International Workshop, PATMOS 2008, Lisbon, Portugal, September 10-12, 2008. Revised Selected Papers ent://SD_ILS/0/SD_ILS:189565 2024-09-03T04:32:05Z 2024-09-03T04:32:05Z Author&#160;Svensson, Lars. editor.&#160;Monteiro, Jos&eacute;. editor.&#160;SpringerLink (Online service)<br/>Preferred Shelf Number&#160;ONLINE<br/>Electronic Access&#160;<a href="http://dx.doi.org/10.1007/978-3-540-95948-9">http://dx.doi.org/10.1007/978-3-540-95948-9</a><br/>Format:&#160;Electronic Resources<br/>Availability&#160;Online Library~1<br/> Introduction to Embedded System Design Using Field Programmable Gate Arrays ent://SD_ILS/0/SD_ILS:175875 2024-09-03T04:32:05Z 2024-09-03T04:32:05Z Author&#160;Dubey, Rahul. author.&#160;SpringerLink (Online service)<br/>Preferred Shelf Number&#160;ONLINE<br/>Electronic Access&#160;<a href="http://dx.doi.org/10.1007/978-1-84882-016-6">http://dx.doi.org/10.1007/978-1-84882-016-6</a><br/>Format:&#160;Electronic Resources<br/>Availability&#160;Online Library~1<br/> Electronics System Design Techniques for Safety Critical Applications ent://SD_ILS/0/SD_ILS:170397 2024-09-03T04:32:05Z 2024-09-03T04:32:05Z Author&#160;Sterpone, Luca. author.&#160;SpringerLink (Online service)<br/>Preferred Shelf Number&#160;ONLINE<br/>Electronic Access&#160;<a href="http://dx.doi.org/10.1007/978-1-4020-8979-4">http://dx.doi.org/10.1007/978-1-4020-8979-4</a><br/>Format:&#160;Electronic Resources<br/>Availability&#160;Online Library~1<br/> Functional Design Errors in Digital Circuits Diagnosis, Correction and Repair ent://SD_ILS/0/SD_ILS:170513 2024-09-03T04:32:05Z 2024-09-03T04:32:05Z Author&#160;Chang, Kai-hui. author.&#160;Markov, Igor L. author.&#160;Bertacco, Valeria. author.&#160;SpringerLink (Online service)<br/>Preferred Shelf Number&#160;ONLINE<br/>Electronic Access&#160;<a href="http://dx.doi.org/10.1007/978-1-4020-9365-4">http://dx.doi.org/10.1007/978-1-4020-9365-4</a><br/>Format:&#160;Electronic Resources<br/>Availability&#160;Online Library~1<br/> Practical Problems in VLSI Physical Design Automation ent://SD_ILS/0/SD_ILS:169876 2024-09-03T04:32:05Z 2024-09-03T04:32:05Z Author&#160;Lim, Sung Kyu. author.&#160;SpringerLink (Online service)<br/>Preferred Shelf Number&#160;ONLINE<br/>Electronic Access&#160;<a href="http://dx.doi.org/10.1007/978-1-4020-6627-6">http://dx.doi.org/10.1007/978-1-4020-6627-6</a><br/>Format:&#160;Electronic Resources<br/>Availability&#160;Online Library~1<br/> High-Level Synthesis From Algorithm to Digital Circuit ent://SD_ILS/0/SD_ILS:170235 2024-09-03T04:32:05Z 2024-09-03T04:32:05Z Author&#160;Coussy, Philippe. editor.&#160;Morawiec, Adam. editor.&#160;SpringerLink (Online service)<br/>Preferred Shelf Number&#160;ONLINE<br/>Electronic Access&#160;<a href="http://dx.doi.org/10.1007/978-1-4020-8588-8">http://dx.doi.org/10.1007/978-1-4020-8588-8</a><br/>Format:&#160;Electronic Resources<br/>Availability&#160;Online Library~1<br/> Integrated Circuit and System Design. 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Power and Timing Modeling, Optimization and Simulation 16th International Workshop, PATMOS 2006, Montpellier, France, September 13-15, 2006. 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