Search Results for Meyr, Heinrich. SirsiDynix Enterprise https://katalog.hacettepe.edu.tr/client/en_US/default/default/qu$003dMeyr$00252C$002bHeinrich.$0026ps$003d300? 2024-10-30T04:33:10Z Digital communication receivers synchronization, channel estimation, and signal processing ent://SD_ILS/0/SD_ILS:300126 2024-10-30T04:33:10Z 2024-10-30T04:33:10Z Author&#160;Meyr, Heinrich.&#160;Moeneclaey, Marc.&#160;Fechtel, Stefan.&#160;John Wiley &amp; Sons.<br/>Preferred Shelf Number&#160;ONLINE<br/>Electronic Access&#160;<a href="http://proquest.safaribooksonline.com/?fpi=9780471502753">Available by subscription from Safari Books Online</a> John Wiley <a href="http://dx.doi.org/10.1002/0471200573">http://dx.doi.org/10.1002/0471200573</a> Volltext <a href="http://proquest.tech.safaribooksonline.de/9780471502753">http://proquest.tech.safaribooksonline.de/9780471502753</a><br/>Format:&#160;Electronic Resources<br/>Availability&#160;Online Library~1<br/> Digital communication receivers : synchronization, channel estimation, and signal processing ent://SD_ILS/0/SD_ILS:40258 2024-10-30T04:33:10Z 2024-10-30T04:33:10Z Author&#160;Meyr, Heinrich.&#160;Moeneclaey, Marc, ort. yaz.&#160;Fechtel, Stefan, ort. yaz.<br/>Preferred Shelf Number&#160;TK 5103.7 M486 1998<br/>Format:&#160;Books<br/>Availability&#160;Beytepe Library~1<br/> Language-driven Exploration and Implementation of Partially Re-configurable ASIPs ent://SD_ILS/0/SD_ILS:170495 2024-10-30T04:33:10Z 2024-10-30T04:33:10Z Author&#160;Chattopadhyay, Anupam. author.&#160;Leupers, Rainer. author.&#160;Meyr, Heinrich. author.&#160;Ascheid, Gerd. author.&#160;SpringerLink (Online service)<br/>Preferred Shelf Number&#160;ONLINE<br/>Electronic Access&#160;<a href="http://dx.doi.org/10.1007/978-1-4020-9297-8">http://dx.doi.org/10.1007/978-1-4020-9297-8</a><br/>Format:&#160;Electronic Resources<br/>Availability&#160;Online Library~1<br/> Retargetable Processor System Integration into Multi-Processor System-on-Chip Platforms ent://SD_ILS/0/SD_ILS:170263 2024-10-30T04:33:10Z 2024-10-30T04:33:10Z Author&#160;Wieferink, Andreas. author.&#160;Meyr, Heinrich. author.&#160;Leupers, Rainer. author.&#160;SpringerLink (Online service)<br/>Preferred Shelf Number&#160;ONLINE<br/>Electronic Access&#160;<a href="http://dx.doi.org/10.1007/978-1-4020-8652-6">http://dx.doi.org/10.1007/978-1-4020-8652-6</a><br/>Format:&#160;Electronic Resources<br/>Availability&#160;Online Library~1<br/> Optimized ASIP Synthesis from Architecture Description Language Models ent://SD_ILS/0/SD_ILS:169564 2024-10-30T04:33:10Z 2024-10-30T04:33:10Z Author&#160;Schliebusch, Oliver. author.&#160;Meyr, Heinrich. author.&#160;Leupers, Rainer. author.&#160;SpringerLink (Online service)<br/>Preferred Shelf Number&#160;ONLINE<br/>Electronic Access&#160;<a href="http://dx.doi.org/10.1007/978-1-4020-5686-4">http://dx.doi.org/10.1007/978-1-4020-5686-4</a><br/>Format:&#160;Electronic Resources<br/>Availability&#160;Online Library~1<br/> Integrated System-Level Modeling of Network-on-Chip enabled Multi-Processor Platforms ent://SD_ILS/0/SD_ILS:169289 2024-10-30T04:33:10Z 2024-10-30T04:33:10Z Author&#160;Kogel, Tim. author.&#160;Leupers, Rainer. author.&#160;Meyr, Heinrich. author.&#160;SpringerLink (Online service)<br/>Preferred Shelf Number&#160;ONLINE<br/>Electronic Access&#160;<a href="http://dx.doi.org/10.1007/1-4020-4826-2">http://dx.doi.org/10.1007/1-4020-4826-2</a><br/>Format:&#160;Electronic Resources<br/>Availability&#160;Online Library~1<br/>