Search Results for Meyr, Heinrich.
SirsiDynix Enterprise
https://katalog.hacettepe.edu.tr/client/en_US/default/default/qu$003dMeyr$00252C$002bHeinrich.$0026te$003dILS$0026ps$003d300?
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Digital communication receivers : synchronization, channel estimation, and signal processing
ent://SD_ILS/0/SD_ILS:40258
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Author Meyr, Heinrich. Moeneclaey, Marc, ort. yaz. Fechtel, Stefan, ort. yaz.<br/>Preferred Shelf Number TK 5103.7 M486 1998<br/>Format: Books<br/>Availability Beytepe Library~1<br/>
Digital communication receivers synchronization, channel estimation, and signal processing
ent://SD_ILS/0/SD_ILS:300126
2024-09-09T04:24:27Z
2024-09-09T04:24:27Z
Author Meyr, Heinrich. Moeneclaey, Marc. Fechtel, Stefan. John Wiley & Sons.<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="http://proquest.safaribooksonline.com/?fpi=9780471502753">Available by subscription from Safari Books Online</a>
John Wiley <a href="http://dx.doi.org/10.1002/0471200573">http://dx.doi.org/10.1002/0471200573</a>
Volltext <a href="http://proquest.tech.safaribooksonline.de/9780471502753">http://proquest.tech.safaribooksonline.de/9780471502753</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>
Language-driven Exploration and Implementation of Partially Re-configurable ASIPs
ent://SD_ILS/0/SD_ILS:170495
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2024-09-09T04:24:27Z
Author Chattopadhyay, Anupam. author. Leupers, Rainer. author. Meyr, Heinrich. author. Ascheid, Gerd. author. SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="http://dx.doi.org/10.1007/978-1-4020-9297-8">http://dx.doi.org/10.1007/978-1-4020-9297-8</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>
Retargetable Processor System Integration into Multi-Processor System-on-Chip Platforms
ent://SD_ILS/0/SD_ILS:170263
2024-09-09T04:24:27Z
2024-09-09T04:24:27Z
Author Wieferink, Andreas. author. Meyr, Heinrich. author. Leupers, Rainer. author. SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="http://dx.doi.org/10.1007/978-1-4020-8652-6">http://dx.doi.org/10.1007/978-1-4020-8652-6</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>
Optimized ASIP Synthesis from Architecture Description Language Models
ent://SD_ILS/0/SD_ILS:169564
2024-09-09T04:24:27Z
2024-09-09T04:24:27Z
Author Schliebusch, Oliver. author. Meyr, Heinrich. author. Leupers, Rainer. author. SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="http://dx.doi.org/10.1007/978-1-4020-5686-4">http://dx.doi.org/10.1007/978-1-4020-5686-4</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>
Integrated System-Level Modeling of Network-on-Chip enabled Multi-Processor Platforms
ent://SD_ILS/0/SD_ILS:169289
2024-09-09T04:24:27Z
2024-09-09T04:24:27Z
Author Kogel, Tim. author. Leupers, Rainer. author. Meyr, Heinrich. author. SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="http://dx.doi.org/10.1007/1-4020-4826-2">http://dx.doi.org/10.1007/1-4020-4826-2</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>