Search Results for Processor Architectures. - Narrowed by: 2017 SirsiDynix Enterprise https://katalog.hacettepe.edu.tr/client/en_US/default/default/qu$003dProcessor$002bArchitectures.$0026qf$003dPUBDATE$002509Publication$002bDate$0025092017$0025092017$0026ic$003dtrue$0026ps$003d300? 2026-06-16T13:33:09Z Data Management on New Hardware 7th International Workshop on Accelerating Data Analysis and Data Management Systems Using Modern Processor and Storage Architectures, ADMS 2016 and 4th International Workshop on In-Memory Data Management and Analytics, IMDM 2016, New Delhi, India, September 1, 2016, Revised Selected Papers ent://SD_ILS/0/SD_ILS:618018 2026-06-16T13:33:09Z 2026-06-16T13:33:09Z Author&#160;Blanas, Spyros. editor.&#160;Bordawekar, Rajesh. editor.&#160;Lahiri, Tirthankar. editor.&#160;Levandoski, Justin. editor.&#160;Pavlo, Andrew. editor.<br/>Preferred Shelf Number&#160;ONLINE<br/>Electronic Access&#160;<a href="https://doi.org/10.1007/978-3-319-56111-0">https://doi.org/10.1007/978-3-319-56111-0</a><br/>Format:&#160;Electronic Resources<br/>Availability&#160;Online Library~1<br/> Embedded Software Verification and Debugging ent://SD_ILS/0/SD_ILS:610988 2026-06-16T13:33:09Z 2026-06-16T13:33:09Z Author&#160;Lettnin, Djones. editor.&#160;Winterholer, Markus. editor.&#160;SpringerLink (Online service)<br/>Preferred Shelf Number&#160;ONLINE<br/>Electronic Access&#160;<a href="https://doi.org/10.1007/978-1-4614-2266-2">https://doi.org/10.1007/978-1-4614-2266-2</a><br/>Format:&#160;Electronic Resources<br/>Availability&#160;Online Library~1<br/> Scaling OpenMP for Exascale Performance and Portability 13th International Workshop on OpenMP, IWOMP 2017, Stony Brook, NY, USA, September 20-22, 2017, Proceedings ent://SD_ILS/0/SD_ILS:610998 2026-06-16T13:33:09Z 2026-06-16T13:33:09Z Author&#160;de Supinski, Bronis R. editor.&#160;Olivier, Stephen L. editor.&#160;Terboven, Christian. editor.&#160;Chapman, Barbara M. editor.&#160;M&uuml;ller, Matthias S. editor.<br/>Preferred Shelf Number&#160;ONLINE<br/>Electronic Access&#160;<a href="https://doi.org/10.1007/978-3-319-65578-9">https://doi.org/10.1007/978-3-319-65578-9</a><br/>Format:&#160;Electronic Resources<br/>Availability&#160;Online Library~1<br/> Green IT Engineering: Concepts, Models, Complex Systems Architectures ent://SD_ILS/0/SD_ILS:611372 2026-06-16T13:33:09Z 2026-06-16T13:33:09Z Author&#160;Kharchenko, Vyacheslav. editor.&#160;Kondratenko, Yuriy. editor.&#160;Kacprzyk, Janusz. editor.&#160;SpringerLink (Online service)<br/>Preferred Shelf Number&#160;ONLINE<br/>Electronic Access&#160;<a href="https://doi.org/10.1007/978-3-319-44162-7">https://doi.org/10.1007/978-3-319-44162-7</a><br/>Format:&#160;Electronic Resources<br/>Availability&#160;Online Library~1<br/> Electromigration Inside Logic Cells Modeling, Analyzing and Mitigating Signal Electromigration in NanoCMOS ent://SD_ILS/0/SD_ILS:612267 2026-06-16T13:33:09Z 2026-06-16T13:33:09Z Author&#160;Posser, Gracieli. author.&#160;Sapatnekar, Sachin S. author.&#160;Reis, Ricardo. author.&#160;SpringerLink (Online service)<br/>Preferred Shelf Number&#160;ONLINE<br/>Electronic Access&#160;<a href="https://doi.org/10.1007/978-3-319-48899-8">https://doi.org/10.1007/978-3-319-48899-8</a><br/>Format:&#160;Electronic Resources<br/>Availability&#160;Online Library~1<br/> Introduction to Logic Circuits &amp; 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