Search Results for Scheduling. - Narrowed by: Processor Architectures. SirsiDynix Enterprise https://katalog.hacettepe.edu.tr/client/en_US/default/default/qu$003dScheduling.$0026qf$003dSUBJECT$002509Subject$002509Processor$002bArchitectures.$002509Processor$002bArchitectures.$0026ic$003dtrue$0026ps$003d300?dt=list 2026-03-18T21:19:46Z Multiprocessor Scheduling for Real-Time Systems ent://SD_ILS/0/SD_ILS:530029 2026-03-18T21:19:46Z 2026-03-18T21:19:46Z Author&#160;Baruah, Sanjoy. author.&#160;Bertogna, Marko. author.&#160;Buttazzo, Giorgio. author.&#160;SpringerLink (Online service)<br/>Preferred Shelf Number&#160;ONLINE<br/>Electronic Access&#160;<a href="https://doi.org/10.1007/978-3-319-08696-5">https://doi.org/10.1007/978-3-319-08696-5</a><br/>Format:&#160;Electronic Resources<br/>Availability&#160;Online Library~1<br/> Energy-aware Scheduling on Multiprocessor Platforms ent://SD_ILS/0/SD_ILS:331714 2026-03-18T21:19:46Z 2026-03-18T21:19:46Z Author&#160;Li, Dawei. author.&#160;Wu, Jie. author.&#160;SpringerLink (Online service)<br/>Preferred Shelf Number&#160;ONLINE(331714.1)<br/>Electronic Access&#160;<a href="http://dx.doi.org/10.1007/978-1-4614-5224-9">http://dx.doi.org/10.1007/978-1-4614-5224-9</a><br/>Format:&#160;Electronic Resources<br/>Availability&#160;Online Library~1<br/> Task Scheduling for Multi-core and Parallel Architectures Challenges, Solutions and Perspectives ent://SD_ILS/0/SD_ILS:613339 2026-03-18T21:19:46Z 2026-03-18T21:19:46Z Author&#160;Chen, Quan. author.&#160;Guo, Minyi. author.&#160;SpringerLink (Online service)<br/>Preferred Shelf Number&#160;ONLINE<br/>Electronic Access&#160;<a href="https://doi.org/10.1007/978-981-10-6238-4">https://doi.org/10.1007/978-981-10-6238-4</a><br/>Format:&#160;Electronic Resources<br/>Availability&#160;Online Library~1<br/> Euro-Par 2024: Parallel Processing 30th European Conference on Parallel and Distributed Processing, Madrid, Spain, August 26-30, 2024, Proceedings, Part I ent://SD_ILS/0/SD_ILS:604846 2026-03-18T21:19:46Z 2026-03-18T21:19:46Z Author&#160;Carretero, Jesus. editor. (orcid)0000-0002-1413-4793&#160;Shende, Sameer. editor. (orcid)0000-0002-2592-669X&#160;Garcia-Blas, Javier. editor. (orcid)0000-0003-1452-1918&#160;Brandic, Ivona. editor. (orcid)0000-0001-7424-0208&#160;Olcoz, Katzalin. editor. (orcid)0000-0002-1821-124X<br/>Preferred Shelf Number&#160;ONLINE<br/>Electronic Access&#160;<a href="https://doi.org/10.1007/978-3-031-69577-3">https://doi.org/10.1007/978-3-031-69577-3</a><br/>Format:&#160;Electronic Resources<br/>Availability&#160;Online Library~1<br/> Euro-Par 2024: Parallel Processing 30th European Conference on Parallel and Distributed Processing, Madrid, Spain, August 26-30, 2024, Proceedings, Part III ent://SD_ILS/0/SD_ILS:604847 2026-03-18T21:19:46Z 2026-03-18T21:19:46Z Author&#160;Carretero, Jesus. editor. (orcid)0000-0002-1413-4793&#160;Shende, Sameer. editor. (orcid)0000-0002-2592-669X&#160;Garcia-Blas, Javier. editor. (orcid)0000-0003-1452-1918&#160;Brandic, Ivona. editor. (orcid)0000-0001-7424-0208&#160;Olcoz, Katzalin. editor. (orcid)0000-0002-1821-124X<br/>Preferred Shelf Number&#160;ONLINE<br/>Electronic Access&#160;<a href="https://doi.org/10.1007/978-3-031-69583-4">https://doi.org/10.1007/978-3-031-69583-4</a><br/>Format:&#160;Electronic Resources<br/>Availability&#160;Online Library~1<br/> Euro-Par 2024: Parallel Processing 30th European Conference on Parallel and Distributed Processing, Madrid, Spain, August 26-30, 2024, Proceedings, Part II ent://SD_ILS/0/SD_ILS:604848 2026-03-18T21:19:46Z 2026-03-18T21:19:46Z Author&#160;Carretero, Jesus. editor. (orcid)0000-0002-1413-4793&#160;Shende, Sameer. editor. (orcid)0000-0002-2592-669X&#160;Garcia-Blas, Javier. editor. (orcid)0000-0003-1452-1918&#160;Brandic, Ivona. editor. (orcid)0000-0001-7424-0208&#160;Olcoz, Katzalin. editor. (orcid)0000-0002-1821-124X<br/>Preferred Shelf Number&#160;ONLINE<br/>Electronic Access&#160;<a href="https://doi.org/10.1007/978-3-031-69766-1">https://doi.org/10.1007/978-3-031-69766-1</a><br/>Format:&#160;Electronic Resources<br/>Availability&#160;Online Library~1<br/> Testing of Interposer-Based 2.5D Integrated Circuits ent://SD_ILS/0/SD_ILS:616892 2026-03-18T21:19:46Z 2026-03-18T21:19:46Z Author&#160;Wang, Ran. author.&#160;Chakrabarty, Krishnendu. author.&#160;SpringerLink (Online service)<br/>Preferred Shelf Number&#160;ONLINE<br/>Electronic Access&#160;<a href="https://doi.org/10.1007/978-3-319-54714-5">https://doi.org/10.1007/978-3-319-54714-5</a><br/>Format:&#160;Electronic Resources<br/>Availability&#160;Online Library~1<br/> Instruction Level Parallelism ent://SD_ILS/0/SD_ILS:611976 2026-03-18T21:19:46Z 2026-03-18T21:19:46Z Author&#160;Aiken, Alex. author.&#160;Banerjee, Utpal. author.&#160;Kejariwal, Arun. author.&#160;Nicolau, Alexandru. author.&#160;SpringerLink (Online service)<br/>Preferred Shelf Number&#160;ONLINE<br/>Electronic Access&#160;<a href="https://doi.org/10.1007/978-1-4899-7797-7">https://doi.org/10.1007/978-1-4899-7797-7</a><br/>Format:&#160;Electronic Resources<br/>Availability&#160;Online Library~1<br/>