Search Results for Syntax. - Narrowed by: Computer architecture.
SirsiDynix Enterprise
https://katalog.hacettepe.edu.tr/client/en_US/default/default/qu$003dSyntax.$0026qf$003dSUBJECT$002509Subject$002509Computer$002barchitecture.$002509Computer$002barchitecture.$0026ps$003d300?dt=list
2026-03-22T09:13:50Z
Programming Language Concepts
ent://SD_ILS/0/SD_ILS:617492
2026-03-22T09:13:50Z
2026-03-22T09:13:50Z
Author Sestoft, Peter. author. SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="https://doi.org/10.1007/978-3-319-60789-4">https://doi.org/10.1007/978-3-319-60789-4</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>
Formal Verification of Simulink/Stateflow Diagrams A Deductive Approach
ent://SD_ILS/0/SD_ILS:616485
2026-03-22T09:13:50Z
2026-03-22T09:13:50Z
Author Zhan, Naijun. author. Wang, Shuling. author. (orcid)0000-0002-2798-2660 Zhao, Hengjun. author. SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="https://doi.org/10.1007/978-3-319-47016-0">https://doi.org/10.1007/978-3-319-47016-0</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>
SystemVerilog Assertions and Functional Coverage Guide to Language, Methodology and Applications
ent://SD_ILS/0/SD_ILS:612282
2026-03-22T09:13:50Z
2026-03-22T09:13:50Z
Author Mehta, Ashok B. author. SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="https://doi.org/10.1007/978-3-319-30539-4">https://doi.org/10.1007/978-3-319-30539-4</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>