Search Results for System design. - Narrowed by: Logic design.
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Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation 22nd International Workshop, PATMOS 2012, Newcastle upon Tyne, UK, September 4-6, 2012, Revised Selected Papers
ent://SD_ILS/0/SD_ILS:334136
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Author Ayala, José L. editor. Shang, Delong. editor. Yakovlev, Alex. editor. SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE(334136.1)<br/>Electronic Access <a href="http://dx.doi.org/10.1007/978-3-642-36157-9">http://dx.doi.org/10.1007/978-3-642-36157-9</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>
Integrated Circuit and System Design. Power and Timing Modeling, Optimization, and Simulation 21st International Workshop, PATMOS 2011, Madrid, Spain, September 26-29, 2011. Proceedings
ent://SD_ILS/0/SD_ILS:195562
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Author Ayala, José L. editor. García-Cámara, Braulio. editor. Prieto, Manuel. editor. Ruggiero, Martino. editor. Sicard, Gilles. editor.<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="http://dx.doi.org/10.1007/978-3-642-24154-3">http://dx.doi.org/10.1007/978-3-642-24154-3</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>
Integrated Circuit and System Design. Power and Timing Modeling, Optimization, and Simulation 20th International Workshop, PATMOS 2010, Grenoble, France, September 7-10, 2010, Revised Selected Papers
ent://SD_ILS/0/SD_ILS:193696
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Author Leuken, René. editor. Sicard, Gilles. editor. SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="http://dx.doi.org/10.1007/978-3-642-17752-1">http://dx.doi.org/10.1007/978-3-642-17752-1</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>
Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation 19th International Workshop, PATMOS 2009, Delft, The Netherlands, September 9-11, 2009, Revised Selected Papers
ent://SD_ILS/0/SD_ILS:191802
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Author Monteiro, José. editor. Leuken, René. editor. SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="http://dx.doi.org/10.1007/978-3-642-11802-9">http://dx.doi.org/10.1007/978-3-642-11802-9</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>
Electronics System Design Techniques for Safety Critical Applications
ent://SD_ILS/0/SD_ILS:170397
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Author Sterpone, Luca. author. SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="http://dx.doi.org/10.1007/978-1-4020-8979-4">http://dx.doi.org/10.1007/978-1-4020-8979-4</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>
Introduction to Embedded System Design Using Field Programmable Gate Arrays
ent://SD_ILS/0/SD_ILS:175875
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Author Dubey, Rahul. author. SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="http://dx.doi.org/10.1007/978-1-84882-016-6">http://dx.doi.org/10.1007/978-1-84882-016-6</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>
Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation 18th International Workshop, PATMOS 2008, Lisbon, Portugal, September 10-12, 2008. Revised Selected Papers
ent://SD_ILS/0/SD_ILS:189565
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Author Svensson, Lars. editor. Monteiro, José. editor. SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="http://dx.doi.org/10.1007/978-3-540-95948-9">http://dx.doi.org/10.1007/978-3-540-95948-9</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>
Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation 17th International Workshop, PATMOS 2007, Gothenburg, Sweden, September 3-5, 2007. Proceedings
ent://SD_ILS/0/SD_ILS:187155
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Author Azémard, Nadine. editor. Svensson, Lars. editor. SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="http://dx.doi.org/10.1007/978-3-540-74442-9">http://dx.doi.org/10.1007/978-3-540-74442-9</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>
Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation 16th International Workshop, PATMOS 2006, Montpellier, France, September 13-15, 2006. Proceedings
ent://SD_ILS/0/SD_ILS:184718
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Author Vounckx, Johan. editor. Azemard, Nadine. editor. Maurine, Philippe. editor. SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="http://dx.doi.org/10.1007/11847083">http://dx.doi.org/10.1007/11847083</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>
Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation 15th International Workshop, PATMOS 2005, Leuven, Belgium, September 21-23, 2005. Proceedings
ent://SD_ILS/0/SD_ILS:183143
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Author Paliouras, Vassilis. editor. Vounckx, Johan. editor. Verkest, Diederik. editor. SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="http://dx.doi.org/10.1007/11556930">http://dx.doi.org/10.1007/11556930</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>
Logically determined design clockless system design with NULL convention logic
ent://SD_ILS/0/SD_ILS:301645
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Author Fant, Karl M.<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="http://www.contentreserve.com/TitleInfo.asp?ID={1F7D25ED-7DB8-40A3-B98F-A6D66E238591}&Format=50">Click for information</a>
<a href="http://proquest.safaribooksonline.com/?fpi=9780471684787">Available by subscription from Safari Books Online</a>
John Wiley <a href="http://dx.doi.org/10.1002/0471702897">http://dx.doi.org/10.1002/0471702897</a>
MyiLibrary, Table of contents <a href="http://www.myilibrary.com?id=25243&ref=toc">http://www.myilibrary.com?id=25243&ref=toc</a>
Volltext <a href="http://proquest.tech.safaribooksonline.de/9780471684787">http://proquest.tech.safaribooksonline.de/9780471684787</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>
Workload Dependent Mitigation Approaches for Performance Variability Ensuring Timing Guarantees of Integrated Circuits
ent://SD_ILS/0/SD_ILS:608661
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Author Lin, Ji-Yung. author. Noltsis, Michalis. author. Soudris, Dimitrios. author. (orcid)0000-0002-6930-6847 Catthoor, Francky. author. SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="https://doi.org/10.1007/978-3-031-85624-2">https://doi.org/10.1007/978-3-031-85624-2</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>
Introduction to Logic Circuits & Logic Design with Verilog
ent://SD_ILS/0/SD_ILS:601869
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Author LaMeres, Brock J. author. SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="https://doi.org/10.1007/978-3-031-43946-9">https://doi.org/10.1007/978-3-031-43946-9</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>
Introduction to Logic Circuits & Logic Design with VHDL
ent://SD_ILS/0/SD_ILS:601878
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Author LaMeres, Brock J. author. SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="https://doi.org/10.1007/978-3-031-42547-9">https://doi.org/10.1007/978-3-031-42547-9</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>
Digital Design from the VLSI Perspective Concepts for VLSI Beginners
ent://SD_ILS/0/SD_ILS:526891
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Author Taraate, Vaibbhav. author. SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="https://doi.org/10.1007/978-981-19-4652-3">https://doi.org/10.1007/978-981-19-4652-3</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>
Introduction to Logic Circuits & Logic Design with VHDL
ent://SD_ILS/0/SD_ILS:612345
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Author LaMeres, Brock J. author. SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="https://doi.org/10.1007/978-3-319-34195-8">https://doi.org/10.1007/978-3-319-34195-8</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>
Fundamentals of Electronic Systems Design
ent://SD_ILS/0/SD_ILS:616724
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Author Lienig, Jens. author. (orcid)0000-0002-2140-4587 Bruemmer, Hans. author. SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="https://doi.org/10.1007/978-3-319-55840-0">https://doi.org/10.1007/978-3-319-55840-0</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>
Introduction to Logic Circuits & Logic Design with Verilog
ent://SD_ILS/0/SD_ILS:614238
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Author LaMeres, Brock J. author. SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="https://doi.org/10.1007/978-3-319-53883-9">https://doi.org/10.1007/978-3-319-53883-9</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>
From Variability Tolerance to Approximate Computing in Parallel Integrated Architectures and Accelerators
ent://SD_ILS/0/SD_ILS:610732
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Author Rahimi, Abbas. author. Benini, Luca. author. Gupta, Rajesh K. author. SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="https://doi.org/10.1007/978-3-319-53768-9">https://doi.org/10.1007/978-3-319-53768-9</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>