Search Results for VLSI. - Narrowed by: Systems engineering. SirsiDynix Enterprise https://katalog.hacettepe.edu.tr/client/en_US/default/default/qu$003dVLSI.$0026qf$003dSUBJECT$002509Subject$002509Systems$002bengineering.$002509Systems$002bengineering.$0026ps$003d300$0026isd$003dtrue? 2024-09-19T19:04:13Z VLSI for Wireless Communication ent://SD_ILS/0/SD_ILS:173825 2024-09-19T19:04:13Z 2024-09-19T19:04:13Z Author&#160;Leung, Bosco. author.&#160;SpringerLink (Online service)<br/>Preferred Shelf Number&#160;ONLINE<br/>Electronic Access&#160;<a href="http://dx.doi.org/10.1007/978-1-4614-0986-1">http://dx.doi.org/10.1007/978-1-4614-0986-1</a><br/>Format:&#160;Electronic Resources<br/>Availability&#160;Online Library~1<br/> Contactless VLSI Measurement and Testing Techniques ent://SD_ILS/0/SD_ILS:401142 2024-09-19T19:04:13Z 2024-09-19T19:04:13Z Author&#160;Sayil, Selahattin. author.&#160;SpringerLink (Online service)<br/>Preferred Shelf Number&#160;ONLINE<br/>Electronic Access&#160;<a href="https://doi.org/10.1007/978-3-319-69673-7">https://doi.org/10.1007/978-3-319-69673-7</a><br/>Format:&#160;Electronic Resources<br/>Availability&#160;Online Library~1<br/> VLSI 2010 Annual Symposium Selected papers ent://SD_ILS/0/SD_ILS:206081 2024-09-19T19:04:13Z 2024-09-19T19:04:13Z Author&#160;Voros, Nikolaos. editor.&#160;Mukherjee, Amar. editor.&#160;Sklavos, Nicolas. editor.&#160;Masselos, Konstantinos. editor.&#160;Huebner, Michael. editor.<br/>Preferred Shelf Number&#160;ONLINE<br/>Electronic Access&#160;<a href="http://dx.doi.org/10.1007/978-94-007-1488-5">http://dx.doi.org/10.1007/978-94-007-1488-5</a><br/>Format:&#160;Electronic Resources<br/>Availability&#160;Online Library~1<br/> Clocking in Modern VLSI Systems ent://SD_ILS/0/SD_ILS:171914 2024-09-19T19:04:13Z 2024-09-19T19:04:13Z Author&#160;Xanthopoulos, Thucydides. editor.&#160;SpringerLink (Online service)<br/>Preferred Shelf Number&#160;ONLINE<br/>Electronic Access&#160;<a href="http://dx.doi.org/10.1007/978-1-4419-0261-0">http://dx.doi.org/10.1007/978-1-4419-0261-0</a><br/>Format:&#160;Electronic Resources<br/>Availability&#160;Online Library~1<br/> VLSI-Design of Non-Volatile Memories ent://SD_ILS/0/SD_ILS:180782 2024-09-19T19:04:13Z 2024-09-19T19:04:13Z Author&#160;Campardo, Giovanni. author.&#160;Micheloni, Rino. author.&#160;Novosel, David. author.&#160;SpringerLink (Online service)<br/>Preferred Shelf Number&#160;ONLINE<br/>Electronic Access&#160;<a href="http://dx.doi.org/10.1007/b137712">http://dx.doi.org/10.1007/b137712</a><br/>Format:&#160;Electronic Resources<br/>Availability&#160;Online Library~1<br/> Harnessing VLSI System Design with EDA Tools ent://SD_ILS/0/SD_ILS:206195 2024-09-19T19:04:13Z 2024-09-19T19:04:13Z Author&#160;Kamat, Rajanish K. author.&#160;Shinde, Santosh A. author.&#160;Gaikwad, Pawan K. author.&#160;Guhilot, Hansraj. author.&#160;SpringerLink (Online service)<br/>Preferred Shelf Number&#160;ONLINE<br/>Electronic Access&#160;<a href="http://dx.doi.org/10.1007/978-94-007-1864-7">http://dx.doi.org/10.1007/978-94-007-1864-7</a><br/>Format:&#160;Electronic Resources<br/>Availability&#160;Online Library~1<br/> Minimizing and Exploiting Leakage in VLSI Design ent://SD_ILS/0/SD_ILS:172107 2024-09-19T19:04:13Z 2024-09-19T19:04:13Z Author&#160;Jayakumar, Nikhil. author.&#160;Paul, Suganth. author.&#160;Garg, Rajesh. author.&#160;Gulati, Kanupriya. author.&#160;Khatri, Sunil P. author.<br/>Preferred Shelf Number&#160;ONLINE<br/>Electronic Access&#160;<a href="http://dx.doi.org/10.1007/978-1-4419-0950-3">http://dx.doi.org/10.1007/978-1-4419-0950-3</a><br/>Format:&#160;Electronic Resources<br/>Availability&#160;Online Library~1<br/> Practical Problems in VLSI Physical Design Automation ent://SD_ILS/0/SD_ILS:169876 2024-09-19T19:04:13Z 2024-09-19T19:04:13Z Author&#160;Lim, Sung Kyu. author.&#160;SpringerLink (Online service)<br/>Preferred Shelf Number&#160;ONLINE<br/>Electronic Access&#160;<a href="http://dx.doi.org/10.1007/978-1-4020-6627-6">http://dx.doi.org/10.1007/978-1-4020-6627-6</a><br/>Format:&#160;Electronic Resources<br/>Availability&#160;Online Library~1<br/> Gain-Cell Embedded DRAMs for Low-Power VLSI Systems-on-Chip ent://SD_ILS/0/SD_ILS:401169 2024-09-19T19:04:13Z 2024-09-19T19:04:13Z Author&#160;Meinerzhagen, Pascal. author.&#160;Teman, Adam. author.&#160;Giterman, Robert. author.&#160;Edri, Noa. author.&#160;Burg, Andreas. author.<br/>Preferred Shelf Number&#160;ONLINE<br/>Electronic Access&#160;<a href="https://doi.org/10.1007/978-3-319-60402-2">https://doi.org/10.1007/978-3-319-60402-2</a><br/>Format:&#160;Electronic Resources<br/>Availability&#160;Online Library~1<br/> VLSI Design: Circuits, Systems and Applications Select Proceedings of ICNETS2, Volume V ent://SD_ILS/0/SD_ILS:401322 2024-09-19T19:04:13Z 2024-09-19T19:04:13Z Author&#160;Li, Jie. editor.&#160;Sankar, A Ravi. editor.&#160;Beulet, P Augusta Sophy. editor.&#160;SpringerLink (Online service)<br/>Preferred Shelf Number&#160;ONLINE<br/>Electronic Access&#160;<a href="https://doi.org/10.1007/978-981-10-7251-2">https://doi.org/10.1007/978-981-10-7251-2</a><br/>Format:&#160;Electronic Resources<br/>Availability&#160;Online Library~1<br/> Proceedings of International Conference on VLSI, Communication, Advanced Devices, Signals &amp; Systems and Networking (VCASAN-2013) ent://SD_ILS/0/SD_ILS:335522 2024-09-19T19:04:13Z 2024-09-19T19:04:13Z Author&#160;Chakravarthi, Veena S. editor.&#160;Shirur, Yasha Jyothi M. editor.&#160;Prasad, Rekha. editor.&#160;SpringerLink (Online service)<br/>Preferred Shelf Number&#160;ONLINE(335522.1)<br/>Electronic Access&#160;<a href="http://dx.doi.org/10.1007/978-81-322-1524-0">http://dx.doi.org/10.1007/978-81-322-1524-0</a><br/>Format:&#160;Electronic Resources<br/>Availability&#160;Online Library~1<br/> Statistical Performance Analysis and Modeling Techniques for Nanometer VLSI Designs ent://SD_ILS/0/SD_ILS:173778 2024-09-19T19:04:13Z 2024-09-19T19:04:13Z Author&#160;Shen, Ruijing. author.&#160;Tan, Sheldon X.-D. author.&#160;Yu, Hao. author.&#160;SpringerLink (Online service)<br/>Preferred Shelf Number&#160;ONLINE<br/>Electronic Access&#160;<a href="http://dx.doi.org/10.1007/978-1-4614-0788-1">http://dx.doi.org/10.1007/978-1-4614-0788-1</a><br/>Format:&#160;Electronic Resources<br/>Availability&#160;Online Library~1<br/> VLSI Physical Design: From Graph Partitioning to Timing Closure ent://SD_ILS/0/SD_ILS:205534 2024-09-19T19:04:13Z 2024-09-19T19:04:13Z Author&#160;Kahng, Andrew B. author.&#160;Lienig, Jens. author.&#160;Markov, Igor L. author.&#160;Hu, Jin. author.&#160;SpringerLink (Online service)<br/>Preferred Shelf Number&#160;ONLINE<br/>Electronic Access&#160;<a href="http://dx.doi.org/10.1007/978-90-481-9591-6">http://dx.doi.org/10.1007/978-90-481-9591-6</a><br/>Format:&#160;Electronic Resources<br/>Availability&#160;Online Library~1<br/> Principles of VLSI RTL Design A Practical Guide ent://SD_ILS/0/SD_ILS:173173 2024-09-19T19:04:13Z 2024-09-19T19:04:13Z Author&#160;Churiwala, Sanjay. author.&#160;Garg, Sapan. author.&#160;SpringerLink (Online service)<br/>Preferred Shelf Number&#160;ONLINE<br/>Electronic Access&#160;<a href="http://dx.doi.org/10.1007/978-1-4419-9296-3">http://dx.doi.org/10.1007/978-1-4419-9296-3</a><br/>Format:&#160;Electronic Resources<br/>Availability&#160;Online Library~1<br/> VLSI Design A Practical Guide for FPGA and ASIC Implementations ent://SD_ILS/0/SD_ILS:173857 2024-09-19T19:04:13Z 2024-09-19T19:04:13Z Author&#160;Chandrasetty, Vikram Arkalgud. author.&#160;SpringerLink (Online service)<br/>Preferred Shelf Number&#160;ONLINE<br/>Electronic Access&#160;<a href="http://dx.doi.org/10.1007/978-1-4614-1120-8">http://dx.doi.org/10.1007/978-1-4614-1120-8</a><br/>Format:&#160;Electronic Resources<br/>Availability&#160;Online Library~1<br/> 3-Dimensional VLSI A 2.5-Dimensional Integration Scheme ent://SD_ILS/0/SD_ILS:190854 2024-09-19T19:04:13Z 2024-09-19T19:04:13Z Author&#160;Deng, Yangdong. author.&#160;Maly, Wojciech P. author.&#160;SpringerLink (Online service)<br/>Preferred Shelf Number&#160;ONLINE<br/>Electronic Access&#160;<a href="http://dx.doi.org/10.1007/978-3-642-04157-0">http://dx.doi.org/10.1007/978-3-642-04157-0</a><br/>Format:&#160;Electronic Resources<br/>Availability&#160;Online Library~1<br/> Analysis and Design of Resilient VLSI Circuits Mitigating Soft Errors and Process Variations ent://SD_ILS/0/SD_ILS:172101 2024-09-19T19:04:13Z 2024-09-19T19:04:13Z Author&#160;Garg, Rajesh. author.&#160;Khatri, Sunil P. author.&#160;SpringerLink (Online service)<br/>Preferred Shelf Number&#160;ONLINE<br/>Electronic Access&#160;<a href="http://dx.doi.org/10.1007/978-1-4419-0931-2">http://dx.doi.org/10.1007/978-1-4419-0931-2</a><br/>Format:&#160;Electronic Resources<br/>Availability&#160;Online Library~1<br/> On and Off-Chip Crosstalk Avoidance in VLSI Design ent://SD_ILS/0/SD_ILS:172106 2024-09-19T19:04:13Z 2024-09-19T19:04:13Z Author&#160;Duan, Chunjie. author.&#160;LaMeres, Brock J. author.&#160;Khatri, Sunil P. author.&#160;SpringerLink (Online service)<br/>Preferred Shelf Number&#160;ONLINE<br/>Electronic Access&#160;<a href="http://dx.doi.org/10.1007/978-1-4419-0947-3">http://dx.doi.org/10.1007/978-1-4419-0947-3</a><br/>Format:&#160;Electronic Resources<br/>Availability&#160;Online Library~1<br/> VLSI Design for Video Coding H.264/AVC Encoding from Standard Specification to Chip ent://SD_ILS/0/SD_ILS:172109 2024-09-19T19:04:13Z 2024-09-19T19:04:13Z Author&#160;Lin, Youn-Long Steve. author.&#160;Kao, Chao-Yang. author.&#160;Kuo, Hung-Chih. author.&#160;Chen, Jian-Wen. author.&#160;SpringerLink (Online service)<br/>Preferred Shelf Number&#160;ONLINE<br/>Electronic Access&#160;<a href="http://dx.doi.org/10.1007/978-1-4419-0959-6">http://dx.doi.org/10.1007/978-1-4419-0959-6</a><br/>Format:&#160;Electronic Resources<br/>Availability&#160;Online Library~1<br/> Digital VLSI Design with Verilog A Textbook from Silicon Valley Technical Institute ent://SD_ILS/0/SD_ILS:170174 2024-09-19T19:04:13Z 2024-09-19T19:04:13Z Author&#160;Williams, John. author.&#160;SpringerLink (Online service)<br/>Preferred Shelf Number&#160;ONLINE<br/>Electronic Access&#160;<a href="http://dx.doi.org/10.1007/978-1-4020-8446-1">http://dx.doi.org/10.1007/978-1-4020-8446-1</a><br/>Format:&#160;Electronic Resources<br/>Availability&#160;Online Library~1<br/> Defect-Oriented Testing for Nano-Metric CMOS VLSI Circuits 2nd Edition ent://SD_ILS/0/SD_ILS:166351 2024-09-19T19:04:13Z 2024-09-19T19:04:13Z Author&#160;Sachdev, Manoj. editor.&#160;Gyvez, Jos&eacute; Pineda de. editor.&#160;SpringerLink (Online service)<br/>Preferred Shelf Number&#160;ONLINE<br/>Electronic Access&#160;<a href="http://dx.doi.org/10.1007/0-387-46547-2">http://dx.doi.org/10.1007/0-387-46547-2</a><br/>Format:&#160;Electronic Resources<br/>Availability&#160;Online Library~1<br/> Vlsi-Soc: From Systems To Silicon Proceedings of IFIP TC 10, WG 10.5, Thirteenth International Conference on Very Large Scale Integration of System on Chip (VLSI-SoC 2005), October 17-19, 2005, Perth, Australia ent://SD_ILS/0/SD_ILS:167075 2024-09-19T19:04:13Z 2024-09-19T19:04:13Z Author&#160;Reis, Ricardo. editor.&#160;Osseiran, Adam. editor.&#160;Pfleiderer, Hans-Joerg. editor.&#160;SpringerLink (Online service)<br/>Preferred Shelf Number&#160;ONLINE<br/>Electronic Access&#160;<a href="http://dx.doi.org/10.1007/978-0-387-73661-7">http://dx.doi.org/10.1007/978-0-387-73661-7</a><br/>Format:&#160;Electronic Resources<br/>Availability&#160;Online Library~1<br/> Routing Congestion in VLSI Circuits: Estimation and Optimization ent://SD_ILS/0/SD_ILS:166413 2024-09-19T19:04:13Z 2024-09-19T19:04:13Z Author&#160;Saxena, Prashant. author.&#160;Shelar, Rupesh S. author.&#160;Sapatnekar, Sachin S. author.&#160;SpringerLink (Online service)<br/>Preferred Shelf Number&#160;ONLINE<br/>Electronic Access&#160;<a href="http://dx.doi.org/10.1007/0-387-48550-3">http://dx.doi.org/10.1007/0-387-48550-3</a><br/>Format:&#160;Electronic Resources<br/>Availability&#160;Online Library~1<br/> Digital VLSI Systems Design A Design Manual for Implementation of Projects on FPGAs and ASICs Using Verilog ent://SD_ILS/0/SD_ILS:169609 2024-09-19T19:04:13Z 2024-09-19T19:04:13Z Author&#160;Ramachandran, S. author.&#160;SpringerLink (Online service)<br/>Preferred Shelf Number&#160;ONLINE<br/>Electronic Access&#160;<a href="http://dx.doi.org/10.1007/978-1-4020-5829-5">http://dx.doi.org/10.1007/978-1-4020-5829-5</a><br/>Format:&#160;Electronic Resources<br/>Availability&#160;Online Library~1<br/> VLSI-SOC: From Systems to Chips IFIP TC 10/ WG 10.5 Twelfth International Conference on Very Large Scale Integration of System on Chip (VLSI-SoC 2003), December 1&ndash;3, 2003, Darmstadt, Germany ent://SD_ILS/0/SD_ILS:165934 2024-09-19T19:04:13Z 2024-09-19T19:04:13Z Author&#160;Glesner, Manfred. editor.&#160;Reis, Ricardo. editor.&#160;Indrusiak, Leandro. editor.&#160;Mooney, Vincent. editor.&#160;Eveking, Hans. editor.<br/>Preferred Shelf Number&#160;ONLINE<br/>Electronic Access&#160;<a href="http://dx.doi.org/10.1007/0-387-33403-3">http://dx.doi.org/10.1007/0-387-33403-3</a><br/>Format:&#160;Electronic Resources<br/>Availability&#160;Online Library~1<br/> Statistical Analysis and Optimization for VLSI: Timing and Power ent://SD_ILS/0/SD_ILS:165284 2024-09-19T19:04:13Z 2024-09-19T19:04:13Z Author&#160;Srivastava, Ashish. author.&#160;Sylvester, Dennis. author.&#160;Blaauw, David. author.&#160;SpringerLink (Online service)<br/>Preferred Shelf Number&#160;ONLINE<br/>Electronic Access&#160;<a href="http://dx.doi.org/10.1007/b137645">http://dx.doi.org/10.1007/b137645</a><br/>Format:&#160;Electronic Resources<br/>Availability&#160;Online Library~1<br/>