Search Results for set. - Narrowed by: Processor Architectures.
SirsiDynix Enterprise
https://katalog.hacettepe.edu.tr/client/en_US/default/default/qu$003dset.$0026qf$003dSUBJECT$002509Subject$002509Processor$002bArchitectures.$002509Processor$002bArchitectures.$0026ic$003dtrue$0026ps$003d300?
2026-05-15T19:00:54Z
Euro-Par 2024: Parallel Processing Workshops Euro-Par 2024 International Workshops, Madrid, Spain, August 26-30, 2024, Proceedings, Part II
ent://SD_ILS/0/SD_ILS:608860
2026-05-15T19:00:54Z
2026-05-15T19:00:54Z
Author Caino-Lores, Silvina. editor. (orcid)0000-0002-6922-0138 Zeinalipour, Demetris. editor. (orcid)0000-0002-7239-2387 Doudali, Thaleia Dimitra. editor. (orcid)0000-0002-3197-839X Singh, David E. editor. (orcid)0000-0002-8125-0049 Garzón, Gracia Ester Martín. editor. (orcid)0000-0002-0568-5470<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="https://doi.org/10.1007/978-3-031-90203-1">https://doi.org/10.1007/978-3-031-90203-1</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>
Euro-Par 2024: Parallel Processing Workshops Euro-Par 2024 International Workshops, Madrid, Spain, August 26-30, 2024, Proceedings, Part I
ent://SD_ILS/0/SD_ILS:609324
2026-05-15T19:00:54Z
2026-05-15T19:00:54Z
Author Caino-Lores, Silvina. editor. (orcid)0000-0002-6922-0138 Zeinalipour, Demetris. editor. (orcid)0000-0002-7239-2387 Doudali, Thaleia Dimitra. editor. (orcid)0000-0002-3197-839X Singh, David E. editor. (orcid)0000-0002-8125-0049 Garzón, Gracia Ester Martín. editor. (orcid)0000-0002-0568-5470<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="https://doi.org/10.1007/978-3-031-90200-0">https://doi.org/10.1007/978-3-031-90200-0</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>
Fundamentals of Electromigration-Aware Integrated Circuit Design
ent://SD_ILS/0/SD_ILS:607413
2026-05-15T19:00:54Z
2026-05-15T19:00:54Z
Author Lienig, Jens. author. (orcid)0000-0002-2140-4587 Rothe, Susann. author. Thiele, Matthias. author. SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="https://doi.org/10.1007/978-3-031-80023-8">https://doi.org/10.1007/978-3-031-80023-8</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>
Quick Start Guide to Verilog
ent://SD_ILS/0/SD_ILS:601842
2026-05-15T19:00:54Z
2026-05-15T19:00:54Z
Author LaMeres, Brock J. author. SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="https://doi.org/10.1007/978-3-031-44104-2">https://doi.org/10.1007/978-3-031-44104-2</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>
Introduction to Logic Circuits & Logic Design with Verilog
ent://SD_ILS/0/SD_ILS:601869
2026-05-15T19:00:54Z
2026-05-15T19:00:54Z
Author LaMeres, Brock J. author. SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="https://doi.org/10.1007/978-3-031-43946-9">https://doi.org/10.1007/978-3-031-43946-9</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>
Quick Start Guide to VHDL
ent://SD_ILS/0/SD_ILS:601872
2026-05-15T19:00:54Z
2026-05-15T19:00:54Z
Author LaMeres, Brock J. author. SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="https://doi.org/10.1007/978-3-031-42543-1">https://doi.org/10.1007/978-3-031-42543-1</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>
Introduction to Logic Circuits & Logic Design with VHDL
ent://SD_ILS/0/SD_ILS:601878
2026-05-15T19:00:54Z
2026-05-15T19:00:54Z
Author LaMeres, Brock J. author. SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="https://doi.org/10.1007/978-3-031-42547-9">https://doi.org/10.1007/978-3-031-42547-9</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>
Euro-Par 2024: Parallel Processing 30th European Conference on Parallel and Distributed Processing, Madrid, Spain, August 26-30, 2024, Proceedings, Part I
ent://SD_ILS/0/SD_ILS:604846
2026-05-15T19:00:54Z
2026-05-15T19:00:54Z
Author Carretero, Jesus. editor. (orcid)0000-0002-1413-4793 Shende, Sameer. editor. (orcid)0000-0002-2592-669X Garcia-Blas, Javier. editor. (orcid)0000-0003-1452-1918 Brandic, Ivona. editor. (orcid)0000-0001-7424-0208 Olcoz, Katzalin. editor. (orcid)0000-0002-1821-124X<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="https://doi.org/10.1007/978-3-031-69577-3">https://doi.org/10.1007/978-3-031-69577-3</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>
Euro-Par 2024: Parallel Processing 30th European Conference on Parallel and Distributed Processing, Madrid, Spain, August 26-30, 2024, Proceedings, Part III
ent://SD_ILS/0/SD_ILS:604847
2026-05-15T19:00:54Z
2026-05-15T19:00:54Z
Author Carretero, Jesus. editor. (orcid)0000-0002-1413-4793 Shende, Sameer. editor. (orcid)0000-0002-2592-669X Garcia-Blas, Javier. editor. (orcid)0000-0003-1452-1918 Brandic, Ivona. editor. (orcid)0000-0001-7424-0208 Olcoz, Katzalin. editor. (orcid)0000-0002-1821-124X<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="https://doi.org/10.1007/978-3-031-69583-4">https://doi.org/10.1007/978-3-031-69583-4</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>
Euro-Par 2024: Parallel Processing 30th European Conference on Parallel and Distributed Processing, Madrid, Spain, August 26-30, 2024, Proceedings, Part II
ent://SD_ILS/0/SD_ILS:604848
2026-05-15T19:00:54Z
2026-05-15T19:00:54Z
Author Carretero, Jesus. editor. (orcid)0000-0002-1413-4793 Shende, Sameer. editor. (orcid)0000-0002-2592-669X Garcia-Blas, Javier. editor. (orcid)0000-0003-1452-1918 Brandic, Ivona. editor. (orcid)0000-0001-7424-0208 Olcoz, Katzalin. editor. (orcid)0000-0002-1821-124X<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="https://doi.org/10.1007/978-3-031-69766-1">https://doi.org/10.1007/978-3-031-69766-1</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>
Computing Platforms for Software-Defined Radio
ent://SD_ILS/0/SD_ILS:615774
2026-05-15T19:00:54Z
2026-05-15T19:00:54Z
Author Hussain, Waqar. editor. Nurmi, Jari. editor. Isoaho, Jouni. editor. Garzia, Fabio. editor. SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="https://doi.org/10.1007/978-3-319-49679-5">https://doi.org/10.1007/978-3-319-49679-5</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>
Introduction to Logic Circuits & Logic Design with VHDL
ent://SD_ILS/0/SD_ILS:612345
2026-05-15T19:00:54Z
2026-05-15T19:00:54Z
Author LaMeres, Brock J. author. SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="https://doi.org/10.1007/978-3-319-34195-8">https://doi.org/10.1007/978-3-319-34195-8</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>
Introduction to Logic Circuits & Logic Design with Verilog
ent://SD_ILS/0/SD_ILS:614238
2026-05-15T19:00:54Z
2026-05-15T19:00:54Z
Author LaMeres, Brock J. author. SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="https://doi.org/10.1007/978-3-319-53883-9">https://doi.org/10.1007/978-3-319-53883-9</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>
Testing of Interposer-Based 2.5D Integrated Circuits
ent://SD_ILS/0/SD_ILS:616892
2026-05-15T19:00:54Z
2026-05-15T19:00:54Z
Author Wang, Ran. author. Chakrabarty, Krishnendu. author. SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="https://doi.org/10.1007/978-3-319-54714-5">https://doi.org/10.1007/978-3-319-54714-5</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>
Automatic Analog IC Sizing and Optimization Constrained with PVT Corners and Layout Effects
ent://SD_ILS/0/SD_ILS:616475
2026-05-15T19:00:54Z
2026-05-15T19:00:54Z
Author Lourenço, Nuno. author. Martins, Ricardo. author. (orcid)0000-0002-8251-1415 Horta, Nuno. author. SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="https://doi.org/10.1007/978-3-319-42037-0">https://doi.org/10.1007/978-3-319-42037-0</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>
Designing with Xilinx® FPGAs Using Vivado
ent://SD_ILS/0/SD_ILS:616558
2026-05-15T19:00:54Z
2026-05-15T19:00:54Z
Author Churiwala, Sanjay. editor. SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="https://doi.org/10.1007/978-3-319-42438-5">https://doi.org/10.1007/978-3-319-42438-5</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>
FPGAs and Parallel Architectures for Aerospace Applications Soft Errors and Fault-Tolerant Design
ent://SD_ILS/0/SD_ILS:611221
2026-05-15T19:00:54Z
2026-05-15T19:00:54Z
Author Kastensmidt, Fernanda. editor. Rech, Paolo. editor. SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="https://doi.org/10.1007/978-3-319-14352-1">https://doi.org/10.1007/978-3-319-14352-1</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>
SystemVerilog Assertions and Functional Coverage Guide to Language, Methodology and Applications
ent://SD_ILS/0/SD_ILS:612282
2026-05-15T19:00:54Z
2026-05-15T19:00:54Z
Author Mehta, Ashok B. author. SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="https://doi.org/10.1007/978-3-319-30539-4">https://doi.org/10.1007/978-3-319-30539-4</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>
Design for Manufacturability with Advanced Lithography
ent://SD_ILS/0/SD_ILS:616554
2026-05-15T19:00:54Z
2026-05-15T19:00:54Z
Author Yu, Bei. author. Pan, David Z. author. SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="https://doi.org/10.1007/978-3-319-20385-0">https://doi.org/10.1007/978-3-319-20385-0</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>
Memory Controllers for Mixed-Time-Criticality Systems Architectures, Methodologies and Trade-offs
ent://SD_ILS/0/SD_ILS:613609
2026-05-15T19:00:54Z
2026-05-15T19:00:54Z
Author Goossens, Sven. author. Chandrasekar, Karthik. author. Akesson, Benny. author. Goossens, Kees. author. SpringerLink (Online service)<br/>Preferred Shelf Number ONLINE<br/>Electronic Access <a href="https://doi.org/10.1007/978-3-319-32094-6">https://doi.org/10.1007/978-3-319-32094-6</a><br/>Format: Electronic Resources<br/>Availability Online Library~1<br/>