Arama Sonu&ccedil;lar&#305; Logic design. - Daralt&#305;lm&#305;&#351;: Engineering. SirsiDynix Enterprise https://katalog.hacettepe.edu.tr/client/tr_TR/default_tr/default_tr/qu$003dLogic$002bdesign.$0026qf$003dSUBJECT$002509Konu$002509Engineering.$002509Engineering.$0026ps$003d300?dt=list 2024-11-24T10:27:05Z Logic Circuit Design Selected Methods ent://SD_ILS/0/SD_ILS:196263 2024-11-24T10:27:05Z 2024-11-24T10:27:05Z Yazar&#160;Vingron, Shimon P. author.&#160;SpringerLink (Online service)<br/>Yer Numaras&#305;&#160;ONLINE<br/>Elektronik Eri&#351;im&#160;<a href="http://dx.doi.org/10.1007/978-3-642-27657-6">http://dx.doi.org/10.1007/978-3-642-27657-6</a><br/>Format:&#160;Elektrnik Kaynak<br/>Durum&#160;&Ccedil;evrimi&ccedil;i K&uuml;t&uuml;phane~1<br/> Towards a Design Flow for Reversible Logic ent://SD_ILS/0/SD_ILS:205530 2024-11-24T10:27:05Z 2024-11-24T10:27:05Z Yazar&#160;Wille, Robert. author.&#160;Drechsler, Rolf. author.&#160;SpringerLink (Online service)<br/>Yer Numaras&#305;&#160;ONLINE<br/>Elektronik Eri&#351;im&#160;<a href="http://dx.doi.org/10.1007/978-90-481-9579-4">http://dx.doi.org/10.1007/978-90-481-9579-4</a><br/>Format:&#160;Elektrnik Kaynak<br/>Durum&#160;&Ccedil;evrimi&ccedil;i K&uuml;t&uuml;phane~1<br/> Fuzzy Logic in Intelligent System Design Theory and Applications ent://SD_ILS/0/SD_ILS:400579 2024-11-24T10:27:05Z 2024-11-24T10:27:05Z Yazar&#160;Melin, Patricia. editor.&#160;Castillo, Oscar. editor.&#160;Kacprzyk, Janusz. editor.&#160;Reformat, Marek. editor.&#160;Melek, William. editor.<br/>Yer Numaras&#305;&#160;ONLINE<br/>Elektronik Eri&#351;im&#160;<a href="https://doi.org/10.1007/978-3-319-67137-6">https://doi.org/10.1007/978-3-319-67137-6</a><br/>Format:&#160;Elektrnik Kaynak<br/>Durum&#160;&Ccedil;evrimi&ccedil;i K&uuml;t&uuml;phane~1<br/> Architecture and Design of Molecule Logic Gates and Atom Circuits Proceedings of the 2nd AtMol European Workshop ent://SD_ILS/0/SD_ILS:333670 2024-11-24T10:27:05Z 2024-11-24T10:27:05Z Yazar&#160;Lorente, Nicolas. editor.&#160;Joachim, Christian. editor.&#160;SpringerLink (Online service)<br/>Yer Numaras&#305;&#160;ONLINE(333670.1)<br/>Elektronik Eri&#351;im&#160;<a href="http://dx.doi.org/10.1007/978-3-642-33137-4">http://dx.doi.org/10.1007/978-3-642-33137-4</a><br/>Format:&#160;Elektrnik Kaynak<br/>Durum&#160;&Ccedil;evrimi&ccedil;i K&uuml;t&uuml;phane~1<br/> Design, Analysis and Test of Logic Circuits Under Uncertainty ent://SD_ILS/0/SD_ILS:335669 2024-11-24T10:27:05Z 2024-11-24T10:27:05Z Yazar&#160;Krishnaswamy, Smita. author.&#160;Markov, Igor L. author.&#160;Hayes, John P. author.&#160;SpringerLink (Online service)<br/>Yer Numaras&#305;&#160;ONLINE(335669.1)<br/>Elektronik Eri&#351;im&#160;<a href="http://dx.doi.org/10.1007/978-90-481-9644-9">http://dx.doi.org/10.1007/978-90-481-9644-9</a><br/>Format:&#160;Elektrnik Kaynak<br/>Durum&#160;&Ccedil;evrimi&ccedil;i K&uuml;t&uuml;phane~1<br/> Asynchronous Operators of Sequential Logic: Venjunction &amp; Sequention Digital Circuit Analysis and Design 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