Arama Sonu&ccedil;lar&#305; Logic design. - Daralt&#305;lm&#305;&#351;: Systems engineering. SirsiDynix Enterprise https://katalog.hacettepe.edu.tr/client/tr_TR/default_tr/default_tr/qu$003dLogic$002bdesign.$0026qf$003dSUBJECT$002509Konu$002509Systems$002bengineering.$002509Systems$002bengineering.$0026ps$003d300?dt=list 2024-11-28T03:57:35Z Logic Circuit Design Selected Methods ent://SD_ILS/0/SD_ILS:196263 2024-11-28T03:57:35Z 2024-11-28T03:57:35Z Yazar&#160;Vingron, Shimon P. author.&#160;SpringerLink (Online service)<br/>Yer Numaras&#305;&#160;ONLINE<br/>Elektronik Eri&#351;im&#160;<a href="http://dx.doi.org/10.1007/978-3-642-27657-6">http://dx.doi.org/10.1007/978-3-642-27657-6</a><br/>Format:&#160;Elektrnik Kaynak<br/>Durum&#160;&Ccedil;evrimi&ccedil;i K&uuml;t&uuml;phane~1<br/> Towards a Design Flow for Reversible Logic ent://SD_ILS/0/SD_ILS:205530 2024-11-28T03:57:35Z 2024-11-28T03:57:35Z Yazar&#160;Wille, Robert. author.&#160;Drechsler, Rolf. author.&#160;SpringerLink (Online service)<br/>Yer Numaras&#305;&#160;ONLINE<br/>Elektronik Eri&#351;im&#160;<a href="http://dx.doi.org/10.1007/978-90-481-9579-4">http://dx.doi.org/10.1007/978-90-481-9579-4</a><br/>Format:&#160;Elektrnik Kaynak<br/>Durum&#160;&Ccedil;evrimi&ccedil;i K&uuml;t&uuml;phane~1<br/> Design, Analysis and Test of Logic Circuits Under Uncertainty ent://SD_ILS/0/SD_ILS:335669 2024-11-28T03:57:35Z 2024-11-28T03:57:35Z Yazar&#160;Krishnaswamy, Smita. author.&#160;Markov, Igor L. author.&#160;Hayes, John P. author.&#160;SpringerLink (Online service)<br/>Yer Numaras&#305;&#160;ONLINE(335669.1)<br/>Elektronik Eri&#351;im&#160;<a href="http://dx.doi.org/10.1007/978-90-481-9644-9">http://dx.doi.org/10.1007/978-90-481-9644-9</a><br/>Format:&#160;Elektrnik Kaynak<br/>Durum&#160;&Ccedil;evrimi&ccedil;i K&uuml;t&uuml;phane~1<br/> Asynchronous Operators of Sequential Logic: Venjunction &amp; Sequention Digital Circuit Analysis and Design ent://SD_ILS/0/SD_ILS:194757 2024-11-28T03:57:35Z 2024-11-28T03:57:35Z Yazar&#160;Vasyukevich, Vadim. author.&#160;SpringerLink (Online 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author.&#160;Kumar, Akash. author.&#160;Veeravalli, Bharadwaj. author.&#160;Catthoor, Francky. author.&#160;SpringerLink (Online service)<br/>Yer Numaras&#305;&#160;ONLINE<br/>Elektronik Eri&#351;im&#160;<a href="https://doi.org/10.1007/978-3-319-69374-3">https://doi.org/10.1007/978-3-319-69374-3</a><br/>Format:&#160;Elektrnik Kaynak<br/>Durum&#160;&Ccedil;evrimi&ccedil;i K&uuml;t&uuml;phane~1<br/> Finite State Machine Logic Synthesis for Complex Programmable Logic Devices ent://SD_ILS/0/SD_ILS:334139 2024-11-28T03:57:35Z 2024-11-28T03:57:35Z Yazar&#160;Czerwinski, Robert. author.&#160;Kania, Dariusz. author.&#160;SpringerLink (Online service)<br/>Yer Numaras&#305;&#160;ONLINE(334139.1)<br/>Elektronik Eri&#351;im&#160;<a href="http://dx.doi.org/10.1007/978-3-642-36166-1">http://dx.doi.org/10.1007/978-3-642-36166-1</a><br/>Format:&#160;Elektrnik Kaynak<br/>Durum&#160;&Ccedil;evrimi&ccedil;i K&uuml;t&uuml;phane~1<br/> Theory of Digital Automata ent://SD_ILS/0/SD_ILS:335923 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