Arama Sonu&ccedil;lar&#305; Optimization. - Daralt&#305;lm&#305;&#351;: Logic design. SirsiDynix Enterprise https://katalog.hacettepe.edu.tr/client/tr_TR/default_tr/default_tr/qu$003dOptimization.$0026qf$003dSUBJECT$002509Konu$002509Logic$002bdesign.$002509Logic$002bdesign.$0026ps$003d300?dt=list 2026-04-06T14:07:45Z Simulation and Optimization of Digital Circuits Considering and Mitigating Destabilizing Factors ent://SD_ILS/0/SD_ILS:399090 2026-04-06T14:07:45Z 2026-04-06T14:07:45Z Yazar&#160;Melikyan, Vazgen. author.&#160;SpringerLink (Online service)<br/>Yer Numaras&#305;&#160;ONLINE<br/>Elektronik Eri&#351;im&#160;<a href="https://doi.org/10.1007/978-3-319-71637-4">https://doi.org/10.1007/978-3-319-71637-4</a><br/>Format:&#160;Elektrnik Kaynak<br/>Durum&#160;&Ccedil;evrimi&ccedil;i K&uuml;t&uuml;phane~1<br/> Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation 22nd International Workshop, PATMOS 2012, Newcastle upon Tyne, UK, September 4-6, 2012, Revised Selected Papers ent://SD_ILS/0/SD_ILS:334136 2026-04-06T14:07:45Z 2026-04-06T14:07:45Z Yazar&#160;Ayala, Jos&eacute; L. editor.&#160;Shang, Delong. editor.&#160;Yakovlev, Alex. editor.&#160;SpringerLink (Online service)<br/>Yer Numaras&#305;&#160;ONLINE(334136.1)<br/>Elektronik Eri&#351;im&#160;<a href="http://dx.doi.org/10.1007/978-3-642-36157-9">http://dx.doi.org/10.1007/978-3-642-36157-9</a><br/>Format:&#160;Elektrnik Kaynak<br/>Durum&#160;&Ccedil;evrimi&ccedil;i K&uuml;t&uuml;phane~1<br/> Integrated Circuit and System Design. Power and Timing Modeling, Optimization, and Simulation 20th International Workshop, PATMOS 2010, Grenoble, France, September 7-10, 2010, Revised Selected Papers ent://SD_ILS/0/SD_ILS:193696 2026-04-06T14:07:45Z 2026-04-06T14:07:45Z Yazar&#160;Leuken, Ren&eacute;. editor.&#160;Sicard, Gilles. editor.&#160;SpringerLink (Online service)<br/>Yer Numaras&#305;&#160;ONLINE<br/>Elektronik Eri&#351;im&#160;<a href="http://dx.doi.org/10.1007/978-3-642-17752-1">http://dx.doi.org/10.1007/978-3-642-17752-1</a><br/>Format:&#160;Elektrnik Kaynak<br/>Durum&#160;&Ccedil;evrimi&ccedil;i K&uuml;t&uuml;phane~1<br/> Integrated Circuit and System Design. Power and Timing Modeling, Optimization, and Simulation 21st International Workshop, PATMOS 2011, Madrid, Spain, September 26-29, 2011. Proceedings ent://SD_ILS/0/SD_ILS:195562 2026-04-06T14:07:45Z 2026-04-06T14:07:45Z Yazar&#160;Ayala, Jos&eacute; L. editor.&#160;Garc&iacute;a-C&aacute;mara, Braulio. editor.&#160;Prieto, Manuel. editor.&#160;Ruggiero, Martino. editor.&#160;Sicard, Gilles. editor.<br/>Yer Numaras&#305;&#160;ONLINE<br/>Elektronik Eri&#351;im&#160;<a href="http://dx.doi.org/10.1007/978-3-642-24154-3">http://dx.doi.org/10.1007/978-3-642-24154-3</a><br/>Format:&#160;Elektrnik Kaynak<br/>Durum&#160;&Ccedil;evrimi&ccedil;i K&uuml;t&uuml;phane~1<br/> Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation 19th International Workshop, PATMOS 2009, Delft, The Netherlands, September 9-11, 2009, Revised Selected Papers ent://SD_ILS/0/SD_ILS:191802 2026-04-06T14:07:45Z 2026-04-06T14:07:45Z Yazar&#160;Monteiro, Jos&eacute;. editor.&#160;Leuken, Ren&eacute;. editor.&#160;SpringerLink (Online service)<br/>Yer Numaras&#305;&#160;ONLINE<br/>Elektronik Eri&#351;im&#160;<a href="http://dx.doi.org/10.1007/978-3-642-11802-9">http://dx.doi.org/10.1007/978-3-642-11802-9</a><br/>Format:&#160;Elektrnik Kaynak<br/>Durum&#160;&Ccedil;evrimi&ccedil;i K&uuml;t&uuml;phane~1<br/> Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation 18th International Workshop, PATMOS 2008, Lisbon, Portugal, September 10-12, 2008. Revised Selected Papers ent://SD_ILS/0/SD_ILS:189565 2026-04-06T14:07:45Z 2026-04-06T14:07:45Z Yazar&#160;Svensson, Lars. editor.&#160;Monteiro, Jos&eacute;. editor.&#160;SpringerLink (Online service)<br/>Yer Numaras&#305;&#160;ONLINE<br/>Elektronik Eri&#351;im&#160;<a href="http://dx.doi.org/10.1007/978-3-540-95948-9">http://dx.doi.org/10.1007/978-3-540-95948-9</a><br/>Format:&#160;Elektrnik Kaynak<br/>Durum&#160;&Ccedil;evrimi&ccedil;i K&uuml;t&uuml;phane~1<br/> Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation 17th International Workshop, PATMOS 2007, Gothenburg, Sweden, September 3-5, 2007. Proceedings ent://SD_ILS/0/SD_ILS:187155 2026-04-06T14:07:45Z 2026-04-06T14:07:45Z Yazar&#160;Az&eacute;mard, Nadine. editor.&#160;Svensson, Lars. editor.&#160;SpringerLink (Online service)<br/>Yer Numaras&#305;&#160;ONLINE<br/>Elektronik Eri&#351;im&#160;<a href="http://dx.doi.org/10.1007/978-3-540-74442-9">http://dx.doi.org/10.1007/978-3-540-74442-9</a><br/>Format:&#160;Elektrnik Kaynak<br/>Durum&#160;&Ccedil;evrimi&ccedil;i K&uuml;t&uuml;phane~1<br/> Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation 16th International Workshop, PATMOS 2006, Montpellier, France, September 13-15, 2006. Proceedings ent://SD_ILS/0/SD_ILS:184718 2026-04-06T14:07:45Z 2026-04-06T14:07:45Z Yazar&#160;Vounckx, Johan. editor.&#160;Azemard, Nadine. editor.&#160;Maurine, Philippe. editor.&#160;SpringerLink (Online service)<br/>Yer Numaras&#305;&#160;ONLINE<br/>Elektronik Eri&#351;im&#160;<a href="http://dx.doi.org/10.1007/11847083">http://dx.doi.org/10.1007/11847083</a><br/>Format:&#160;Elektrnik Kaynak<br/>Durum&#160;&Ccedil;evrimi&ccedil;i K&uuml;t&uuml;phane~1<br/> Global Optimization and Constraint Satisfaction Second International Workshop, COCOS 2003, Lausanne, Switzerland, November 18-21, 2003, Revised Selected Papers ent://SD_ILS/0/SD_ILS:183106 2026-04-06T14:07:45Z 2026-04-06T14:07:45Z Yazar&#160;Jermann, Christophe. editor.&#160;Neumaier, Arnold. editor.&#160;Sam, Djamila. editor.&#160;SpringerLink (Online service)<br/>Yer Numaras&#305;&#160;ONLINE<br/>Elektronik Eri&#351;im&#160;<a href="http://dx.doi.org/10.1007/b136292">http://dx.doi.org/10.1007/b136292</a><br/>Format:&#160;Elektrnik Kaynak<br/>Durum&#160;&Ccedil;evrimi&ccedil;i K&uuml;t&uuml;phane~1<br/> Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation 15th International Workshop, PATMOS 2005, Leuven, Belgium, September 21-23, 2005. Proceedings ent://SD_ILS/0/SD_ILS:183143 2026-04-06T14:07:45Z 2026-04-06T14:07:45Z Yazar&#160;Paliouras, Vassilis. editor.&#160;Vounckx, Johan. editor.&#160;Verkest, Diederik. editor.&#160;SpringerLink (Online service)<br/>Yer Numaras&#305;&#160;ONLINE<br/>Elektronik Eri&#351;im&#160;<a href="http://dx.doi.org/10.1007/11556930">http://dx.doi.org/10.1007/11556930</a><br/>Format:&#160;Elektrnik Kaynak<br/>Durum&#160;&Ccedil;evrimi&ccedil;i K&uuml;t&uuml;phane~1<br/> Versatile Hardware Analysis Techniques From Waveform-based Analysis to Formal Verification ent://SD_ILS/0/SD_ILS:607564 2026-04-06T14:07:45Z 2026-04-06T14:07:45Z Yazar&#160;Klemmer, Lucas. author.&#160;Gro&szlig;e, Daniel. author. (orcid)0000-0002-1490-6175&#160;SpringerLink (Online service)<br/>Yer Numaras&#305;&#160;ONLINE<br/>Elektronik Eri&#351;im&#160;<a href="https://doi.org/10.1007/978-3-031-83093-8">https://doi.org/10.1007/978-3-031-83093-8</a><br/>Format:&#160;Elektrnik Kaynak<br/>Durum&#160;&Ccedil;evrimi&ccedil;i K&uuml;t&uuml;phane~1<br/> Reversible Computation 9th International Conference, RC 2017, Kolkata, India, July 6-7, 2017, Proceedings ent://SD_ILS/0/SD_ILS:612715 2026-04-06T14:07:45Z 2026-04-06T14:07:45Z Yazar&#160;Phillips, Iain. editor.&#160;Rahaman, Hafizur. editor.&#160;SpringerLink (Online service)<br/>Yer Numaras&#305;&#160;ONLINE<br/>Elektronik Eri&#351;im&#160;<a href="https://doi.org/10.1007/978-3-319-59936-6">https://doi.org/10.1007/978-3-319-59936-6</a><br/>Format:&#160;Elektrnik Kaynak<br/>Durum&#160;&Ccedil;evrimi&ccedil;i K&uuml;t&uuml;phane~1<br/> Artificial Intelligence and Soft Computing 16th International Conference, ICAISC 2017, Zakopane, Poland, June 11-15, 2017, Proceedings, Part II ent://SD_ILS/0/SD_ILS:611801 2026-04-06T14:07:45Z 2026-04-06T14:07:45Z Yazar&#160;Rutkowski, Leszek. editor. (orcid)0000-0001-6960-9525&#160;Korytkowski, Marcin. editor.&#160;Scherer, Rafa&#322;. editor. (orcid)0000-0001-9592-262X&#160;Tadeusiewicz, Ryszard. editor.&#160;Zadeh, Lotfi A. editor.<br/>Yer Numaras&#305;&#160;ONLINE<br/>Elektronik Eri&#351;im&#160;<a href="https://doi.org/10.1007/978-3-319-59060-8">https://doi.org/10.1007/978-3-319-59060-8</a><br/>Format:&#160;Elektrnik Kaynak<br/>Durum&#160;&Ccedil;evrimi&ccedil;i K&uuml;t&uuml;phane~1<br/> Applications of Evolutionary Computation 20th European Conference, EvoApplications 2017, Amsterdam, The Netherlands, April 19-21, 2017, Proceedings, Part I ent://SD_ILS/0/SD_ILS:616071 2026-04-06T14:07:45Z 2026-04-06T14:07:45Z Yazar&#160;Squillero, Giovanni. editor.&#160;Sim, Kevin. editor.&#160;SpringerLink (Online service)<br/>Yer Numaras&#305;&#160;ONLINE<br/>Elektronik Eri&#351;im&#160;<a href="https://doi.org/10.1007/978-3-319-55849-3">https://doi.org/10.1007/978-3-319-55849-3</a><br/>Format:&#160;Elektrnik Kaynak<br/>Durum&#160;&Ccedil;evrimi&ccedil;i K&uuml;t&uuml;phane~1<br/> Applications of Evolutionary Computation 20th European Conference, EvoApplications 2017, Amsterdam, The Netherlands, April 19-21, 2017, Proceedings, Part II ent://SD_ILS/0/SD_ILS:616016 2026-04-06T14:07:45Z 2026-04-06T14:07:45Z Yazar&#160;Squillero, Giovanni. editor.&#160;Sim, Kevin. editor.&#160;SpringerLink (Online service)<br/>Yer Numaras&#305;&#160;ONLINE<br/>Elektronik Eri&#351;im&#160;<a href="https://doi.org/10.1007/978-3-319-55792-2">https://doi.org/10.1007/978-3-319-55792-2</a><br/>Format:&#160;Elektrnik Kaynak<br/>Durum&#160;&Ccedil;evrimi&ccedil;i K&uuml;t&uuml;phane~1<br/> Testing of Interposer-Based 2.5D Integrated Circuits ent://SD_ILS/0/SD_ILS:616892 2026-04-06T14:07:45Z 2026-04-06T14:07:45Z Yazar&#160;Wang, Ran. author.&#160;Chakrabarty, Krishnendu. author.&#160;SpringerLink (Online service)<br/>Yer Numaras&#305;&#160;ONLINE<br/>Elektronik Eri&#351;im&#160;<a href="https://doi.org/10.1007/978-3-319-54714-5">https://doi.org/10.1007/978-3-319-54714-5</a><br/>Format:&#160;Elektrnik Kaynak<br/>Durum&#160;&Ccedil;evrimi&ccedil;i K&uuml;t&uuml;phane~1<br/> New Data Structures and Algorithms for Logic Synthesis and Verification ent://SD_ILS/0/SD_ILS:617019 2026-04-06T14:07:45Z 2026-04-06T14:07:45Z Yazar&#160;Amaru, Luca Gaetano. author.&#160;SpringerLink (Online service)<br/>Yer Numaras&#305;&#160;ONLINE<br/>Elektronik Eri&#351;im&#160;<a href="https://doi.org/10.1007/978-3-319-43174-1">https://doi.org/10.1007/978-3-319-43174-1</a><br/>Format:&#160;Elektrnik Kaynak<br/>Durum&#160;&Ccedil;evrimi&ccedil;i K&uuml;t&uuml;phane~1<br/> High Performance Integer Arithmetic Circuit Design on FPGA Architecture, Implementation and Design Automation ent://SD_ILS/0/SD_ILS:612605 2026-04-06T14:07:45Z 2026-04-06T14:07:45Z Yazar&#160;Palchaudhuri, Ayan. author.&#160;Chakraborty, Rajat Subhra. author.&#160;SpringerLink (Online service)<br/>Yer Numaras&#305;&#160;ONLINE<br/>Elektronik Eri&#351;im&#160;<a href="https://doi.org/10.1007/978-81-322-2520-1">https://doi.org/10.1007/978-81-322-2520-1</a><br/>Format:&#160;Elektrnik Kaynak<br/>Durum&#160;&Ccedil;evrimi&ccedil;i K&uuml;t&uuml;phane~1<br/>