Arama Sonuçları VLSI. - Daraltılmış: Logic design.SirsiDynix Enterprisehttps://katalog.hacettepe.edu.tr/client/tr_TR/default_tr/default_tr/qu$003dVLSI.$0026qf$003dSUBJECT$002509Konu$002509Logic$002bdesign.$002509Logic$002bdesign.$0026te$003dILS$0026ps$003d300?2024-11-12T22:27:52ZMachine Learning in VLSI Computer-Aided Designent://SD_ILS/0/SD_ILS:4857352024-11-12T22:27:52Z2024-11-12T22:27:52ZYazar Elfadel, Ibrahim (Abe) M. editor. Boning, Duane S. editor. Li, Xin. editor. SpringerLink (Online service)<br/>Yer Numarası ONLINE<br/>Elektronik Erişim <a href="https://doi.org/10.1007/978-3-030-04666-8">https://doi.org/10.1007/978-3-030-04666-8</a><br/>Format: Elektrnik Kaynak<br/>Durum Çevrimiçi Kütüphane~1<br/>Practical Problems in VLSI Physical Design Automationent://SD_ILS/0/SD_ILS:1698762024-11-12T22:27:52Z2024-11-12T22:27:52ZYazar Lim, Sung Kyu. author. SpringerLink (Online service)<br/>Yer Numarası ONLINE<br/>Elektronik Erişim <a href="http://dx.doi.org/10.1007/978-1-4020-6627-6">http://dx.doi.org/10.1007/978-1-4020-6627-6</a><br/>Format: Elektrnik Kaynak<br/>Durum Çevrimiçi Kütüphane~1<br/>Algorithmic and Knowledge-based CAD for VLSIent://SD_ILS/0/SD_ILS:2477432024-11-12T22:27:52Z2024-11-12T22:27:52ZYazar Taylor, Gaynor, ed. Russell, Gordon, ed.<br/>Yer Numarası ONLINE<br/>Elektronik Erişim <a href="http://dx.doi.org/10.1049/PBCS004E">http://dx.doi.org/10.1049/PBCS004E</a><br/>Format: Elektrnik Kaynak<br/>Durum Çevrimiçi Kütüphane~1<br/>VLSI-SoC: Opportunities and Challenges Beyond the Internet of Things 25th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2017, Abu Dhabi, United Arab Emirates, October 23–25, 2017, Revised and Extended Selected Papersent://SD_ILS/0/SD_ILS:4868672024-11-12T22:27:52Z2024-11-12T22:27:52ZYazar Maniatakos, Michail. editor. (orcid)0000-0001-6899-0651 Elfadel, Ibrahim (Abe) M. editor. (orcid)0000-0003-3220-9987 Sonza Reorda, Matteo. editor. (orcid)0000-0003-2899-7669 Ugurdag, H. Fatih. editor. (orcid)0000-0002-6256-0850 Monteiro, José. editor. (orcid)0000-0003-0603-2268<br/>Yer Numarası ONLINE<br/>Elektronik Erişim <a href="https://doi.org/10.1007/978-3-030-15663-3">https://doi.org/10.1007/978-3-030-15663-3</a><br/>Format: Elektrnik Kaynak<br/>Durum Çevrimiçi Kütüphane~1<br/>VLSI-SoC: Design and Engineering of Electronics Systems Based on New Computing Paradigms 26th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2018, Verona, Italy, October 8–10, 2018, Revised and Extended Selected Papersent://SD_ILS/0/SD_ILS:4867562024-11-12T22:27:52Z2024-11-12T22:27:52ZYazar Bombieri, Nicola. editor. Pravadelli, Graziano. editor. Fujita, Masahiro. editor. Austin, Todd. editor. Reis, Ricardo. editor.<br/>Yer Numarası ONLINE<br/>Elektronik Erişim <a href="https://doi.org/10.1007/978-3-030-23425-6">https://doi.org/10.1007/978-3-030-23425-6</a><br/>Format: Elektrnik Kaynak<br/>Durum Çevrimiçi Kütüphane~1<br/>VLSI-SoC: Advanced Research for Systems on Chip 19th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2011, Hong Kong, China, October 3-5, 2011, Revised Selected Papersent://SD_ILS/0/SD_ILS:1972722024-11-12T22:27:52Z2024-11-12T22:27:52ZYazar Mir, Salvador. editor. Tsui, Chi-Ying. editor. Reis, Ricardo. editor. Choy, Oliver C. S. editor. SpringerLink (Online service)<br/>Yer Numarası ONLINE<br/>Elektronik Erişim <a href="http://dx.doi.org/10.1007/978-3-642-32770-4">http://dx.doi.org/10.1007/978-3-642-32770-4</a><br/>Format: Elektrnik Kaynak<br/>Durum Çevrimiçi Kütüphane~1<br/>Progress in VLSI Design and Test 16th International Symposium, VDAT 2012, Shibpur, India, July 1-4, 2012. Proceedingsent://SD_ILS/0/SD_ILS:1970902024-11-12T22:27:52Z2024-11-12T22:27:52ZYazar Rahaman, Hafizur. editor. Chattopadhyay, Sanatan. editor. Chattopadhyay, Santanu. editor. SpringerLink (Online service)<br/>Yer Numarası ONLINE<br/>Elektronik Erişim <a href="http://dx.doi.org/10.1007/978-3-642-31494-0">http://dx.doi.org/10.1007/978-3-642-31494-0</a><br/>Format: Elektrnik Kaynak<br/>Durum Çevrimiçi Kütüphane~1<br/>VLSI Physical Design: From Graph Partitioning to Timing Closureent://SD_ILS/0/SD_ILS:2055342024-11-12T22:27:52Z2024-11-12T22:27:52ZYazar Kahng, Andrew B. author. Lienig, Jens. author. Markov, Igor L. author. Hu, Jin. author. SpringerLink (Online service)<br/>Yer Numarası ONLINE<br/>Elektronik Erişim <a href="http://dx.doi.org/10.1007/978-90-481-9591-6">http://dx.doi.org/10.1007/978-90-481-9591-6</a><br/>Format: Elektrnik Kaynak<br/>Durum Çevrimiçi Kütüphane~1<br/>