Arama Sonu&ccedil;lar&#305; circuit. - Daralt&#305;lm&#305;&#351;: Computer science. SirsiDynix Enterprise https://katalog.hacettepe.edu.tr/client/tr_TR/default_tr/default_tr/qu$003dcircuit.$0026qf$003dSUBJECT$002509Konu$002509Computer$002bscience.$002509Computer$002bscience.$0026ps$003d300$0026isd$003dtrue?dt=list 2025-12-05T17:07:03Z Fundamentals of Electromigration-Aware Integrated Circuit Design ent://SD_ILS/0/SD_ILS:401953 2025-12-05T17:07:03Z 2025-12-05T17:07:03Z Yazar&#160;Lienig, Jens. author.&#160;Thiele, Matthias. author.&#160;SpringerLink (Online service)<br/>Yer Numaras&#305;&#160;ONLINE<br/>Elektronik Eri&#351;im&#160;<a href="https://doi.org/10.1007/978-3-319-73558-0">https://doi.org/10.1007/978-3-319-73558-0</a><br/>Format:&#160;Elektrnik Kaynak<br/>Durum&#160;&Ccedil;evrimi&ccedil;i K&uuml;t&uuml;phane~1<br/> Hybrid ADCs, Smart Sensors for the IoT, and Sub-1V &amp; Advanced Node Analog Circuit Design Advances in Analog Circuit Design 2017 ent://SD_ILS/0/SD_ILS:402679 2025-12-05T17:07:03Z 2025-12-05T17:07:03Z Yazar&#160;Harpe, Pieter. editor.&#160;Makinwa, Kofi A. A. editor.&#160;Baschirotto, Andrea. editor.&#160;SpringerLink (Online service)<br/>Yer Numaras&#305;&#160;ONLINE<br/>Elektronik Eri&#351;im&#160;<a href="https://doi.org/10.1007/978-3-319-61285-0">https://doi.org/10.1007/978-3-319-61285-0</a><br/>Format:&#160;Elektrnik Kaynak<br/>Durum&#160;&Ccedil;evrimi&ccedil;i K&uuml;t&uuml;phane~1<br/> Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation 22nd International Workshop, PATMOS 2012, Newcastle upon Tyne, UK, September 4-6, 2012, Revised Selected Papers ent://SD_ILS/0/SD_ILS:334136 2025-12-05T17:07:03Z 2025-12-05T17:07:03Z Yazar&#160;Ayala, Jos&eacute; L. editor.&#160;Shang, Delong. editor.&#160;Yakovlev, Alex. editor.&#160;SpringerLink (Online service)<br/>Yer Numaras&#305;&#160;ONLINE(334136.1)<br/>Elektronik Eri&#351;im&#160;<a href="http://dx.doi.org/10.1007/978-3-642-36157-9">http://dx.doi.org/10.1007/978-3-642-36157-9</a><br/>Format:&#160;Elektrnik Kaynak<br/>Durum&#160;&Ccedil;evrimi&ccedil;i K&uuml;t&uuml;phane~1<br/> Analog Circuit Design for Process Variation-Resilient Systems-on-a-Chip ent://SD_ILS/0/SD_ILS:174143 2025-12-05T17:07:03Z 2025-12-05T17:07:03Z Yazar&#160;Onabajo, Marvin. author.&#160;Silva-Martinez, Jose. author.&#160;SpringerLink (Online service)<br/>Yer Numaras&#305;&#160;ONLINE<br/>Elektronik Eri&#351;im&#160;<a href="http://dx.doi.org/10.1007/978-1-4614-2296-9">http://dx.doi.org/10.1007/978-1-4614-2296-9</a><br/>Format:&#160;Elektrnik Kaynak<br/>Durum&#160;&Ccedil;evrimi&ccedil;i K&uuml;t&uuml;phane~1<br/> Integrated Circuit and System Design. Power and Timing Modeling, Optimization, and Simulation 21st International Workshop, PATMOS 2011, Madrid, Spain, September 26-29, 2011. Proceedings ent://SD_ILS/0/SD_ILS:195562 2025-12-05T17:07:03Z 2025-12-05T17:07:03Z Yazar&#160;Ayala, Jos&eacute; L. editor.&#160;Garc&iacute;a-C&aacute;mara, Braulio. editor.&#160;Prieto, Manuel. editor.&#160;Ruggiero, Martino. editor.&#160;Sicard, Gilles. editor.<br/>Yer Numaras&#305;&#160;ONLINE<br/>Elektronik Eri&#351;im&#160;<a href="http://dx.doi.org/10.1007/978-3-642-24154-3">http://dx.doi.org/10.1007/978-3-642-24154-3</a><br/>Format:&#160;Elektrnik Kaynak<br/>Durum&#160;&Ccedil;evrimi&ccedil;i K&uuml;t&uuml;phane~1<br/> Integrated Circuit and System Design. Power and Timing Modeling, Optimization, and Simulation 20th International Workshop, PATMOS 2010, Grenoble, France, September 7-10, 2010, Revised Selected Papers ent://SD_ILS/0/SD_ILS:193696 2025-12-05T17:07:03Z 2025-12-05T17:07:03Z Yazar&#160;Leuken, Ren&eacute;. editor.&#160;Sicard, Gilles. editor.&#160;SpringerLink (Online service)<br/>Yer Numaras&#305;&#160;ONLINE<br/>Elektronik Eri&#351;im&#160;<a href="http://dx.doi.org/10.1007/978-3-642-17752-1">http://dx.doi.org/10.1007/978-3-642-17752-1</a><br/>Format:&#160;Elektrnik Kaynak<br/>Durum&#160;&Ccedil;evrimi&ccedil;i K&uuml;t&uuml;phane~1<br/> Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation 19th International Workshop, PATMOS 2009, Delft, The Netherlands, September 9-11, 2009, Revised Selected Papers ent://SD_ILS/0/SD_ILS:191802 2025-12-05T17:07:03Z 2025-12-05T17:07:03Z Yazar&#160;Monteiro, Jos&eacute;. editor.&#160;Leuken, Ren&eacute;. editor.&#160;SpringerLink (Online service)<br/>Yer Numaras&#305;&#160;ONLINE<br/>Elektronik Eri&#351;im&#160;<a href="http://dx.doi.org/10.1007/978-3-642-11802-9">http://dx.doi.org/10.1007/978-3-642-11802-9</a><br/>Format:&#160;Elektrnik Kaynak<br/>Durum&#160;&Ccedil;evrimi&ccedil;i K&uuml;t&uuml;phane~1<br/> Analog Circuit Design Smart Data Converters, Filters on Chip, Multimode Transmitters ent://SD_ILS/0/SD_ILS:204972 2025-12-05T17:07:03Z 2025-12-05T17:07:03Z Yazar&#160;Roermund, Arthur H. M. editor.&#160;Casier, Herman. editor.&#160;Steyaert, Michiel. editor.&#160;SpringerLink (Online service)<br/>Yer Numaras&#305;&#160;ONLINE<br/>Elektronik Eri&#351;im&#160;<a href="http://dx.doi.org/10.1007/978-90-481-3083-2">http://dx.doi.org/10.1007/978-90-481-3083-2</a><br/>Format:&#160;Elektrnik Kaynak<br/>Durum&#160;&Ccedil;evrimi&ccedil;i K&uuml;t&uuml;phane~1<br/> Analog Circuit Design High-speed Clock and Data Recovery, High-performance Amplifiers, Power Management ent://SD_ILS/0/SD_ILS:170387 2025-12-05T17:07:03Z 2025-12-05T17:07:03Z Yazar&#160;Steyaert, Michiel. editor.&#160;Roermund, Arthur H. M. van. editor.&#160;Casier, Herman. editor.&#160;SpringerLink (Online service)<br/>Yer Numaras&#305;&#160;ONLINE<br/>Elektronik Eri&#351;im&#160;<a href="http://dx.doi.org/10.1007/978-1-4020-8944-2">http://dx.doi.org/10.1007/978-1-4020-8944-2</a><br/>Format:&#160;Elektrnik Kaynak<br/>Durum&#160;&Ccedil;evrimi&ccedil;i K&uuml;t&uuml;phane~1<br/> Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation 18th International Workshop, PATMOS 2008, Lisbon, Portugal, September 10-12, 2008. Revised Selected Papers ent://SD_ILS/0/SD_ILS:189565 2025-12-05T17:07:03Z 2025-12-05T17:07:03Z Yazar&#160;Svensson, Lars. editor.&#160;Monteiro, Jos&eacute;. editor.&#160;SpringerLink (Online service)<br/>Yer Numaras&#305;&#160;ONLINE<br/>Elektronik Eri&#351;im&#160;<a href="http://dx.doi.org/10.1007/978-3-540-95948-9">http://dx.doi.org/10.1007/978-3-540-95948-9</a><br/>Format:&#160;Elektrnik Kaynak<br/>Durum&#160;&Ccedil;evrimi&ccedil;i K&uuml;t&uuml;phane~1<br/> Circuit and Interconnect Design for RF and High Bit-Rate Applications ent://SD_ILS/0/SD_ILS:169979 2025-12-05T17:07:03Z 2025-12-05T17:07:03Z Yazar&#160;Veenstra, Hugo. author.&#160;Long, John R. author.&#160;SpringerLink (Online service)<br/>Yer Numaras&#305;&#160;ONLINE<br/>Elektronik Eri&#351;im&#160;<a href="http://dx.doi.org/10.1007/978-1-4020-6884-3">http://dx.doi.org/10.1007/978-1-4020-6884-3</a><br/>Format:&#160;Elektrnik Kaynak<br/>Durum&#160;&Ccedil;evrimi&ccedil;i K&uuml;t&uuml;phane~1<br/> High-Level Synthesis From Algorithm to Digital Circuit ent://SD_ILS/0/SD_ILS:170235 2025-12-05T17:07:03Z 2025-12-05T17:07:03Z Yazar&#160;Coussy, Philippe. editor.&#160;Morawiec, Adam. editor.&#160;SpringerLink (Online service)<br/>Yer Numaras&#305;&#160;ONLINE<br/>Elektronik Eri&#351;im&#160;<a href="http://dx.doi.org/10.1007/978-1-4020-8588-8">http://dx.doi.org/10.1007/978-1-4020-8588-8</a><br/>Format:&#160;Elektrnik Kaynak<br/>Durum&#160;&Ccedil;evrimi&ccedil;i K&uuml;t&uuml;phane~1<br/> Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation 17th International Workshop, PATMOS 2007, Gothenburg, Sweden, September 3-5, 2007. Proceedings ent://SD_ILS/0/SD_ILS:187155 2025-12-05T17:07:03Z 2025-12-05T17:07:03Z Yazar&#160;Az&eacute;mard, Nadine. editor.&#160;Svensson, Lars. editor.&#160;SpringerLink (Online service)<br/>Yer Numaras&#305;&#160;ONLINE<br/>Elektronik Eri&#351;im&#160;<a href="http://dx.doi.org/10.1007/978-3-540-74442-9">http://dx.doi.org/10.1007/978-3-540-74442-9</a><br/>Format:&#160;Elektrnik Kaynak<br/>Durum&#160;&Ccedil;evrimi&ccedil;i K&uuml;t&uuml;phane~1<br/> Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation 16th International Workshop, PATMOS 2006, Montpellier, France, September 13-15, 2006. Proceedings ent://SD_ILS/0/SD_ILS:184718 2025-12-05T17:07:03Z 2025-12-05T17:07:03Z Yazar&#160;Vounckx, Johan. editor.&#160;Azemard, Nadine. editor.&#160;Maurine, Philippe. editor.&#160;SpringerLink (Online service)<br/>Yer Numaras&#305;&#160;ONLINE<br/>Elektronik Eri&#351;im&#160;<a href="http://dx.doi.org/10.1007/11847083">http://dx.doi.org/10.1007/11847083</a><br/>Format:&#160;Elektrnik Kaynak<br/>Durum&#160;&Ccedil;evrimi&ccedil;i K&uuml;t&uuml;phane~1<br/> Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation 15th International Workshop, PATMOS 2005, Leuven, Belgium, September 21-23, 2005. Proceedings ent://SD_ILS/0/SD_ILS:183143 2025-12-05T17:07:03Z 2025-12-05T17:07:03Z Yazar&#160;Paliouras, Vassilis. editor.&#160;Vounckx, Johan. editor.&#160;Verkest, Diederik. editor.&#160;SpringerLink (Online service)<br/>Yer Numaras&#305;&#160;ONLINE<br/>Elektronik Eri&#351;im&#160;<a href="http://dx.doi.org/10.1007/11556930">http://dx.doi.org/10.1007/11556930</a><br/>Format:&#160;Elektrnik Kaynak<br/>Durum&#160;&Ccedil;evrimi&ccedil;i K&uuml;t&uuml;phane~1<br/>