Arama Sonuçları test VLSI.SirsiDynix Enterprisehttps://katalog.hacettepe.edu.tr/client/tr_TR/default_tr/default_tr/qu$003dtest$002bVLSI.$0026ic$003dtrue$0026te$003dILS$0026ps$003d300?dt=list2024-12-27T03:40:12ZVLSI Design and Test for Systems Dependabilityent://SD_ILS/0/SD_ILS:4837112024-12-27T03:40:12Z2024-12-27T03:40:12ZYazar Asai, Shojiro. editor. SpringerLink (Online service)<br/>Yer Numarası ONLINE<br/>Elektronik Erişim <a href="https://doi.org/10.1007/978-4-431-56594-9">https://doi.org/10.1007/978-4-431-56594-9</a><br/>Format: Elektrnik Kaynak<br/>Durum Çevrimiçi Kütüphane~1<br/>Test Generation of Crosstalk Delay Faults in VLSI Circuitsent://SD_ILS/0/SD_ILS:4844152024-12-27T03:40:12Z2024-12-27T03:40:12ZYazar Jayanthy, S. author. Bhuvaneswari, M.C. author. SpringerLink (Online service)<br/>Yer Numarası ONLINE<br/>Elektronik Erişim <a href="https://doi.org/10.1007/978-981-13-2493-2">https://doi.org/10.1007/978-981-13-2493-2</a><br/>Format: Elektrnik Kaynak<br/>Durum Çevrimiçi Kütüphane~1<br/>VLSI Design and Test 22nd International Symposium, VDAT 2018, Madurai, India, June 28-30, 2018, Revised Selected Papersent://SD_ILS/0/SD_ILS:4835822024-12-27T03:40:12Z2024-12-27T03:40:12ZYazar Rajaram, S. editor. Balamurugan, N.B. editor. Gracia Nirmala Rani, D. editor. Singh, Virendra. editor. SpringerLink (Online service)<br/>Yer Numarası ONLINE<br/>Elektronik Erişim <a href="https://doi.org/10.1007/978-981-13-5950-7">https://doi.org/10.1007/978-981-13-5950-7</a><br/>Format: Elektrnik Kaynak<br/>Durum Çevrimiçi Kütüphane~1<br/>VLSI Design and Test 23rd International Symposium, VDAT 2019, Indore, India, July 4–6, 2019, Revised Selected Papersent://SD_ILS/0/SD_ILS:4866872024-12-27T03:40:12Z2024-12-27T03:40:12ZYazar Sengupta, Anirban. editor. Dasgupta, Sudeb. editor. Singh, Virendra. editor. Sharma, Rohit. editor. Kumar Vishvakarma, Santosh. editor.<br/>Yer Numarası ONLINE<br/>Elektronik Erişim <a href="https://doi.org/10.1007/978-981-32-9767-8">https://doi.org/10.1007/978-981-32-9767-8</a><br/>Format: Elektrnik Kaynak<br/>Durum Çevrimiçi Kütüphane~1<br/>VLSI Design and Test 17th International Symposium, VDAT 2013, Jaipur, India, July 27-30, 2013, Revised Selected Papersent://SD_ILS/0/SD_ILS:3351562024-12-27T03:40:12Z2024-12-27T03:40:12ZYazar Gaur, Manoj Singh. editor. Zwolinski, Mark. editor. Laxmi, Vijay. editor. Boolchandani, Dharmendra. editor. Sing, Virendra. editor.<br/>Yer Numarası ONLINE(335156.1)<br/>Elektronik Erişim <a href="http://dx.doi.org/10.1007/978-3-642-42024-5">http://dx.doi.org/10.1007/978-3-642-42024-5</a><br/>Format: Elektrnik Kaynak<br/>Durum Çevrimiçi Kütüphane~1<br/>Progress in VLSI Design and Test 16th International Symposium, VDAT 2012, Shibpur, India, July 1-4, 2012. Proceedingsent://SD_ILS/0/SD_ILS:1970902024-12-27T03:40:12Z2024-12-27T03:40:12ZYazar Rahaman, Hafizur. editor. Chattopadhyay, Sanatan. editor. Chattopadhyay, Santanu. editor. SpringerLink (Online service)<br/>Yer Numarası ONLINE<br/>Elektronik Erişim <a href="http://dx.doi.org/10.1007/978-3-642-31494-0">http://dx.doi.org/10.1007/978-3-642-31494-0</a><br/>Format: Elektrnik Kaynak<br/>Durum Çevrimiçi Kütüphane~1<br/>VLSI test principles and architectures design for testabilityent://SD_ILS/0/SD_ILS:2537792024-12-27T03:40:12Z2024-12-27T03:40:12ZYazar Wang, Laung-Terng. Wu, Cheng-Wen, EE Ph. D. Wen, Xiaoqing.<br/>Yer Numarası ONLINE<br/>Elektronik Erişim ScienceDirect <a href="http://www.sciencedirect.com/science/book/9780123705976">http://www.sciencedirect.com/science/book/9780123705976</a><br/>Format: Elektrnik Kaynak<br/>Durum Çevrimiçi Kütüphane~1<br/>Advanced research in VLSI proceedings of the fifth MIT conference, March 1988ent://SD_ILS/0/SD_ILS:2202762024-12-27T03:40:12Z2024-12-27T03:40:12ZYazar Allen, Jonathan, 1934- Leighton, Frank Thomson. Massachusetts Institute of Technology. Microsystems Research Center. MIT Conference on Advanced Research in VLSI (5th : 1988 : Cambridge, Mass.)<br/>Yer Numarası ONLINE<br/>Elektronik Erişim IEEE Xplore <a href="http://ieeexplore.ieee.org/xpl/bkabstractplus.jsp?bkn=6276833">http://ieeexplore.ieee.org/xpl/bkabstractplus.jsp?bkn=6276833</a><br/>Format: Elektrnik Kaynak<br/>Durum Çevrimiçi Kütüphane~1<br/>Logic testing and design for testabilityent://SD_ILS/0/SD_ILS:2201532024-12-27T03:40:12Z2024-12-27T03:40:12ZYazar Fujiwara, Hideo.<br/>Yer Numarası ONLINE<br/>Elektronik Erişim IEEE Xplore <a href="http://ieeexplore.ieee.org/xpl/bkabstractplus.jsp?bkn=6267264">http://ieeexplore.ieee.org/xpl/bkabstractplus.jsp?bkn=6267264</a><br/>Format: Elektrnik Kaynak<br/>Durum Çevrimiçi Kütüphane~1<br/>