Flip-Flop Design in Nanometer CMOS From High Speed to Low Energy
tarafından
 
Alioto, Massimo. author.

Başlık
Flip-Flop Design in Nanometer CMOS From High Speed to Low Energy

Yazar
Alioto, Massimo. author.

ISBN
9783319019970

Basım Bilgisi
1st ed. 2015.

Fiziksel Tanımlama
XV, 260 p. 123 illus., 5 illus. in color. online resource.

İçerik
The Logical Effort Method -- Design in the Energy-Delay Space -- Clocked Storage Elements -- Flip-Flop Optimized Design -- Analysis and Comparison in the Energy-Delay-Area Domain -- Energy Efficiency Versus Clock Slope -- Hold Time Issues and Impact of variations on Flip-Flop Topologies -- Ultra-Fast and Energy-Efficient Pulsed Latch Topologies.

Konu Terimleri
Electronic circuits.
 
Microprocessors.
 
Computer architecture.
 
Microtechnology.
 
Microelectromechanical systems.
 
Electronic Circuits and Systems.
 
Processor Architectures.
 
Microsystems and MEMS.

Yazar Ek Girişi
Consoli, Elio.
 
Palumbo, Gaetano.

Tüzel Kişi Ek Girişi
SpringerLink (Online service)

Elektronik Erişim
https://doi.org/10.1007/978-3-319-01997-0


KütüphaneMateryal TürüDemirbaş NumarasıYer Numarası[[missing key: search.ChildField.HOLDING]]Durumu/İade Tarihi
Çevrimiçi KütüphaneE-Kitap530401-1001ONLINEElektronik Kütüphane