Logic Functions and Equations Examples and Exercises

Introduction to Embedded System Design Using Field Programmable Gate Arrays

Logic Synthesis for FSM-Based Control Units

Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation 18th International Workshop, PATMOS 2008, Lisbon, Portugal, September 10-12, 2008. Revised Selected Papers

Practical Problems in VLSI Physical Design Automation

High-Level Synthesis From Algorithm to Digital Circuit

Logic Synthesis for Compositional Microprogram Control Units

Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation 17th International Workshop, PATMOS 2007, Gothenburg, Sweden, September 3-5, 2007. Proceedings

A Roadmap for Formal Property Verification

Layoutsynthese elektronischer Schaltungen — Grundlegende Algorithmen für die Entwurfsautomatisierung

Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation 16th International Workshop, PATMOS 2006, Montpellier, France, September 13-15, 2006. Proceedings

Taxonomies for the Development and Verification of Digital Systems