Design for embedded image processing on FPGAs için kapak resmi
Başlık:
Design for embedded image processing on FPGAs
Yazar:
Bailey, Donald G. (Donald Graeme), 1962-
ISBN:
9780470828519

9780470828496

9781119819820
Yayın Bilgileri:
Singapore : John Wiley & Sons (Asia), 2011.
Fiziksel Tanımlama:
1 online resource (xvi, 482 p.) : ill. (some col.).
İçerik:
""Design for Embedded Image Processing on FPGAs""; ""Contents""; ""Preface""; ""Acknowledgements""; ""1 Image Processing""; ""1.1 Basic Definitions""; ""1.2 Image Formation""; ""1.3 Image Processing Operations""; ""1.4 Example Application""; ""1.5 Real-Time Image Processing""; ""1.6 Embedded Image Processing""; ""1.7 Serial Processing""; ""1.8 Parallelism""; ""1.9 Hardware Image Processing Systems""; ""2 Field Programmable Gate Arrays""; ""2.1 Programmable Logic""; ""2.1.1 FPGAs vs. ASICs""; ""2.2 FPGAs and Image Processing""; ""2.3 Inside an FPGA""; ""2.3.1 Logic""; ""2.3.2 Interconnect""

""2.3.3 Input and Output""""2.3.4 Clocking""; ""2.3.5 Configuration""; ""2.3.6 Power Consumption""; ""2.4 FPGA Families and Features""; ""2.4.1 Xilinx""; ""2.4.2 Altera""; ""2.4.3 Lattice Semiconductor""; ""2.4.4 Achronix""; ""2.4.5 SiliconBlue""; ""2.4.6 Tabula""; ""2.4.7 Actel""; ""2.4.8 Atmel""; ""2.4.9 QuickLogic""; ""2.4.10 MathStar""; ""2.4.11 Cypress""; ""2.5 Choosing an FPGA or Development Board""; ""3 Languages""; ""3.1 Hardware Description Languages""; ""3.2 Software-Based Languages""; ""3.2.1 Structural Approaches""; ""3.2.2 Augmented Languages""

""3.2.3 Native Compilation Techniques""""3.3 Visual Languages""; ""3.3.1 Behavioural""; ""3.3.2 Dataflow""; ""3.3.3 Hybrid""; ""3.4 Summary""; ""4 Design Process""; ""4.1 Problem Specification""; ""4.2 Algorithm Development""; ""4.2.1 Algorithm Development Process""; ""4.2.2 Algorithm Structure""; ""4.2.3 FPGA Development Issues""; ""4.3 Architecture Selection""; ""4.3.1 System Level Architecture""; ""4.3.2 Computational Architecture""; ""4.3.3 Partitioning between Hardware and Software""; ""4.4 System Implementation""; ""4.4.1 Mapping to FPGA Resources""; ""4.4.2 Algorithm Mapping Issues""

""4.4.3 Design Flow""""4.5 Designing for Tuning and Debugging""; ""4.5.1 Algorithm Tuning""; ""4.5.2 System Debugging""; ""5 Mapping Techniques""; ""5.1 Timing Constraints""; ""5.1.1 Low Level Pipelining""; ""5.1.2 Process Synchronisation""; ""5.1.3 Multiple Clock Domains""; ""5.2 Memory Bandwidth Constraints""; ""5.2.1 Memory Architectures""; ""5.2.2 Caching""; ""5.2.3 Row Buffering""; ""5.2.4 Other Memory Structures""; ""5.3 Resource Constraints""; ""5.3.1 Resource Multiplexing""; ""5.3.2 Resource Controllers""; ""5.3.3 Reconfigurability""; ""5.4 Computational Techniques""

""5.4.1 Number Systems""""5.4.2 Lookup Tables""; ""5.4.3 CORDIC""; ""5.4.4 Approximations""; ""5.4.5 Other Techniques""; ""5.5 Summary""; ""6 Point Operations""; ""6.1 Point Operations on a Single Image""; ""6.1.1 Contrast and Brightness Adjustment""; ""6.1.2 Global Thresholding and Contouring""; ""6.1.3 Lookup Table Implementation""; ""6.2 Point Operations on Multiple Images""; ""6.2.1 Image Averaging""; ""6.2.2 Image Subtraction""; ""6.2.3 Image Comparison""; ""6.2.4 Intensity Scaling""; ""6.2.5 Masking""; ""6.3 Colour Image Processing""; ""6.3.1 False Colouring""
Özet:
"Introductory material will consider the problem of embedded image processing, and how some of the issues may be solved using parallel hardware solutions. Field programmable gate arrays (FPGAs) are introduced as a technology that provides flexible, fine-grained hardware that can readily exploit parallelism within many image processing algorithms. A brief review of FPGA programming languages provides the link between a software mindset normally associated with image processing algorithms, and the hardware mindset required for efficient utilization of a parallel hardware design. The bulk of the book will focus on the design process, and in particular how designing an FPGA implementation differs from a conventional software implementation. Particular attention is given to the techniques for mapping an algorithm onto an FPGA implementation, considering timing, memory bandwidth and resource constraints, and efficient hardware computational techniques. Extensive coverage will be given of a range of image processing operations, discussing efficient implementations and how these may vary according to the application. The techniques will be illustrated with several example applications or case studies from projects or applications I have been involves with. Issues such as interfacing between the FPGA and peripheral devices will be covered briefly, as will designing the system in such a way that it can be more readily debugged and tuned"-- Provided by publisher.

"The bulk of the book will focus on the design process, and in particular how designing an FPGA implementation differs from a conventional software implementation"-- Provided by publisher.
Notlar:
John Wiley and Sons
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E-Kitap 596052-1001 TK7895 .E42 B3264 2011 EB
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