Cyber Physical Systems. Design, Modeling, and Evaluation 7th International Workshop, CyPhy 2017, Seoul, South Korea, October 15-20, 2017, Revised Selected Papers

VLSI Design and Test 23rd International Symposium, VDAT 2019, Indore, India, July 4–6, 2019, Revised Selected Papers

VLSI Design and Test 22nd International Symposium, VDAT 2018, Madurai, India, June 28-30, 2018, Revised Selected Papers

Design Concepts for a Virtualizable Embedded MPSoC Architecture Enabling Virtualization in Embedded Multi-Processor Systems

VLSI Design and Test 17th International Symposium, VDAT 2013, Jaipur, India, July 27-30, 2013, Revised Selected Papers

Design, Analysis and Test of Logic Circuits Under Uncertainty

VLSI-SoC: From Algorithms to Circuits and System-on-Chip Design 20th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2012, Santa Cruz, CA, USA, October 7-10, 2012, Revised Selected Papers

Multicore Systems On-Chip: Practical Software/Hardware Design 2nd Edition

Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation 19th International Workshop, PATMOS 2009, Delft, The Netherlands, September 9-11, 2009, Revised Selected Papers

Hardware Software Co-Design of a Multimedia SOC Platform

Design, Automation, and Test in Europe The Most Influential Papers of 10 Years Date

Embedded Systems Specification and Design Languages Selected contributions from FDL’07

Practical Aspects of Embedded System Design using Microcontrollers

Closing the Power Gap Between ASIC & Custom Tools and Techniques for Low Power Design

Digital VLSI Systems Design A Design Manual for Implementation of Projects on FPGAs and ASICs Using Verilog

Co-design for System Acceleration A Quantitative Approach

Low Power Methodology Manual For System-on-Chip Design

Knowledge Enterprise: Intelligent Strategies in Product Design, Manufacturing, and Management Proceedings of PROLAMAT 2006, IFIP TC5 International Conference, June 15–17, 2006, Shanghai, China

SystemVerilog for Design A Guide to Using SystemVerilog for Hardware Design and Modeling

Applications of Specification and Design Languages for SoCs Selected papers from FDL 2005

Platform Based Design at the Electronic System Level Industry Perspectives and Experiences

System-Level Design Techniques for Energy-Efficient Embedded Systems

Correct Hardware Design and Verification Methods 13th IFIP WG 10.5 Advanced Research Working Conference, CHARME 2005, Saarbrücken, Germany, October 3-6, 2005. Proceedings

Computer Safety, Reliability, and Security SAFECOMP 2018 Workshops, ASSURE, DECSoS, SASSUR, STRIVE, and WAISE, Västerås, Sweden, September 18, 2018, Proceedings

Tools and Algorithms for the Construction and Analysis of Systems 24th International Conference, TACAS 2018, Held as Part of the European Joint Conferences on Theory and Practice of Software, ETAPS 2018, Thessaloniki, Greece, April 14-20, 2018, Proceedings, Part II

Software Engineering and Formal Methods SEFM 2017 Collocated Workshops: DataMod, FAACS, MSE, CoSim-CPS, and FOCLASA, Trento, Italy, September 4-5, 2017, Revised Selected Papers

Reliable Software Technologies – Ada-Europe 2018 23rd Ada-Europe International Conference on Reliable Software Technologies, Lisbon, Portugal, June 18-22, 2018, Proceedings

Nanoelektronik Kleiner — schneller — besser

SystemVerilog for Verification A Guide to Learning the Testbench Language Features

VLSI-SoC: Advanced Research for Systems on Chip 19th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2011, Hong Kong, China, October 3-5, 2011, Revised Selected Papers

Computer Aided Verification 24th International Conference, CAV 2012, Berkeley, CA, USA, July 7-13, 2012 Proceedings

Power Electronics and Instrumentation Engineering International Conference, PEIE 2010, Kochi, Kerala, India, September 7-9, 2010. Proceedings

Post-Silicon and Runtime Verification for Modern Processors

Advances in Power Electronics and Instrumentation Engineering Second International Conference, PEIE 2011, Nagpur, Maharashtra, India, April 21-22, 2011. Proceedings

Quantifying and Exploring the Gap Between FPGAs and ASICs Measuring and Exploring

Low-Power High-Level Synthesis for Nanoscale CMOS Circuits

CMOS Active Inductors and Transformers Principle, Implementation, and Applications

System Verilog for Verification A Guide to Learning the Testbench Language Features

Verilog and SystemVerilog Gotchas 101 Common Coding Errors and How to Avoid Them

Hardware Verification with SystemVerilog An Object-Oriented Framework

IT-Projektrecht Vertragliche Gestaltung und Steuerung von IT-Projekten, Best Practices, Haftung der Geschäftsleitung

CMOS Current-Mode Circuits for Data Communications

Leakage in Nanometer CMOS Technologies

Systemverilog for Verification A Guide to Learning the Testbench Language Features

Fully-Depleted SOI CMOS Circuits and Technology for Ultralow-Power Applications

Interconnect Noise Optimization in Nanometer Technologies

Scalable Hardware Verification with Symbolic Simulation

SystemC Kernel Extensions for Heterogeneous System Modeling A framework for Multi-MoC Modeling & Simulation

System-level Test and Validation of Hardware/Software Systems