Logic Circuit Design Selected Methods

Towards a Design Flow for Reversible Logic

Design, Analysis and Test of Logic Circuits Under Uncertainty

Asynchronous Operators of Sequential Logic: Venjunction & Sequention Digital Circuit Analysis and Design

Simulation and Optimization of Digital Circuits Considering and Mitigating Destabilizing Factors

Design of FPGA-Based Computing Systems with OpenCL

Principles and Structures of FPGAs

ASIC/SoC Functional Design Verification A Comprehensive Guide to Technologies and Methodologies

Introduzione al Progetto di Sistemi Digitali

Reliable and Energy Efficient Streaming Multiprocessor Systems

Finite State Machine Logic Synthesis for Complex Programmable Logic Devices

Theory of Digital Automata

Entwurf integrierter 3D-Systeme der Elektronik

Adiabatic Logic Future Trend and System Level Perspective

The Unknown Component Problem Theory and Applications

Compact Models and Measurement Techniques for High-Speed Interconnects

Technische Informatik Band 2: Entwurf digitaler Schaltungen

VLSI Physical Design: From Graph Partitioning to Timing Closure

Regular Nanofabrics in Emerging Technologies Design and Fabrication Methods for Nanoscale Digital Circuits

Intelligent control systems with an introduction to system of systems engineering

Speech Processing in Embedded Systems

Electronics System Design Techniques for Safety Critical Applications

Introduction to Embedded System Design Using Field Programmable Gate Arrays

Logic Functions and Equations Examples and Exercises

Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation 18th International Workshop, PATMOS 2008, Lisbon, Portugal, September 10-12, 2008. Revised Selected Papers

Logic Synthesis for FSM-Based Control Units

Functional Design Errors in Digital Circuits Diagnosis, Correction and Repair

More than Moore Creating High Value Micro/Nanoelectronics Systems

Practical Problems in VLSI Physical Design Automation

High-Level Synthesis From Algorithm to Digital Circuit

Logic Synthesis for Compositional Microprogram Control Units

Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation 17th International Workshop, PATMOS 2007, Gothenburg, Sweden, September 3-5, 2007. Proceedings

A Roadmap for Formal Property Verification

Layoutsynthese elektronischer Schaltungen — Grundlegende Algorithmen für die Entwurfsautomatisierung

Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation 16th International Workshop, PATMOS 2006, Montpellier, France, September 13-15, 2006. Proceedings

Taxonomies for the Development and Verification of Digital Systems