Rapid Prototyping of Digital Systems

Nanometer Technology Designs High-Quality Delay Tests

Low-Power High-Level Synthesis for Nanoscale CMOS Circuits

CMOS Active Inductors and Transformers Principle, Implementation, and Applications

System Verilog for Verification A Guide to Learning the Testbench Language Features

Verilog and SystemVerilog Gotchas 101 Common Coding Errors and How to Avoid Them

Closing the Power Gap Between ASIC & Custom Tools and Techniques for Low Power Design

SAT-Based Scalable Formal Verification Solutions

Writing Testbenches using System Verilog

Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation 15th International Workshop, PATMOS 2005, Leuven, Belgium, September 21-23, 2005. Proceedings

Digital Design and Implementation with Field Programmable Devices

Assertion-Based Design